# US 12,004,431 B2 · Structure and method for MRAM devices

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- Number: US 12,004,431 B2
- Document ID: US12004431B2
- Status: Granted
- Kind: B2
- Application number: 17/206,527
- Filed: 2021-03-19
- Published: 2022-05-05
- Granted: 2024-06-04
- Earliest claimed: 2020-10-30
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Tsung-Chieh Hsiao; Po-Sheng Lu; Wei-Chih Wen; Liang-Wei Wang; Yu-Jen Wang; Dian-Hau Chen; Yen-Ming Chen
- Web page: https://patentgrep.com/patent/US12004431B2

## CPC

- H10B 61/22: {of the field-effect transistor [FET] type}
- H10N 50/80: Constructional details
- H10B 61/00: Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10N 50/01: Manufacture or treatment
- H10N 50/10: Magnetoresistive devices
- H10N 50/85: Materials of the active region
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A semiconductor device includes a bottom electrode; a magnetic tunneling junction (MTJ) element over the bottom electrode; a top electrode over the MTJ element; and a sidewall spacer abutting the MTJ element, wherein at least one of the bottom electrode, the top electrode, and the sidewall spacer includes a magnetic material.

## Claims

### Claim 1

A semiconductor device, comprising:
a bottom electrode;
a magnetic tunneling junction (MTJ) element over the bottom electrode;
a top electrode over the MTJ element; and
a sidewall spacer abutting the MTJ element, wherein the top electrode includes a first conductive layer and a first barrier layer, wherein the first barrier layer includes a first sublayer, a second sublayer on the first sublayer, and a third sublayer on the second sublayer, wherein each of the first, second, and third sublayers is disposed on a bottom and two sidewall surfaces of the first conductive layer, wherein the second sublayer includes a magnetic material.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first conductive layer includes copper.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the first sublayer includes tantalum.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the bottom electrode includes a second conductive layer and a second barrier layer, wherein the second barrier layer includes a fourth sublayer, a fifth sublayer on the fourth sublayer, and a sixth sublayer on the fifth sublayer, wherein each of the fourth, fifth, and sixth sublayers is disposed on a bottom and two sidewall surfaces of the second conductive layer, wherein the fifth sublayer includes another magnetic material.

### Claim 5 (depends on 4)

The semiconductor device of claim 4, wherein the fourth sublayer includes at least one of TiN and TaN.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the sidewall spacer includes multiple layers, and one of the layers includes another magnetic material.

### Claim 7 (depends on 6)

The semiconductor device of claim 6, wherein the magnetic material in the sidewall spacer is Co or NiFe.

### Claim 8 (depends on 6)

The semiconductor device of claim 6, wherein the magnetic material in the sidewall spacer is disposed between a nitride spacer and an oxide spacer.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein at least one of the bottom electrode and the sidewall spacer include one or more magnetic materials.

### Claim 10 (depends on 1)

The semiconductor device of claim 1, wherein all of the bottom electrode, the top electrode, and the sidewall spacer include one or more magnetic materials.

### Claim 11

A semiconductor device, comprising:
a bottom electrode;
a magnetic tunneling junction (MTJ) element over the bottom electrode;
a top electrode over the MTJ element; and
a sidewall spacer abutting the MTJ element, wherein the sidewall spacer includes a first magnetic material, wherein the top electrode includes a first conductive layer and a first barrier layer on a bottom and two sidewalls of the first conductive layer, wherein each of the first conductive layer and the first barrier layer includes a second magnetic material, wherein the first barrier layer includes a first sublayer, a second sublayer on the first sublayer, and a third sublayer on the second sublayer, wherein each of the first, second, and third sublayers is disposed on a bottom and two sidewall surfaces of the first conductive layer, wherein the second sublayer includes the second magnetic material.

### Claim 12 (depends on 11)

The semiconductor device of claim 11, wherein the first magnetic material includes at least one of Co and NiFe.

### Claim 13 (depends on 11)

The semiconductor device of claim 11, wherein the sidewall spacer includes a stack of a nitride spacer, the first magnetic material, and an oxide spacer.

### Claim 14 (depends on 11)

The semiconductor device of claim 11, wherein the bottom electrode includes another magnetic material.

### Claim 15

A semiconductor device, comprising:
a bottom electrode;
a magnetic tunneling junction (MTJ) element over the bottom electrode;
a conductive hard mask layer over the MTJ element;
a top electrode over the conductive hard mask layer; and
a sidewall spacer abutting the MTJ element, wherein the top electrode includes a first conductive layer and a first barrier layer, the first barrier layer includes a first sublayer directly on the conductive hard mask layer and the sidewall spacer, a second sublayer on the first sublayer, and a third sublayer on the second sublayer, wherein at least the second sublayer is disposed on a bottom and two sidewall surfaces of the first conductive layer, wherein the second sublayer includes a first magnetic material.

### Claim 16 (depends on 15)

The semiconductor device of claim 15, wherein the conductive hard mask layer includes a metal nitride.

### Claim 17 (depends on 16)

The semiconductor device of claim 16, wherein the first magnetic material includes cobalt or NiFe.

### Claim 18 (depends on 1)

The semiconductor device of claim 1, further comprising a conductive hardmask disposed between the top electrode and the MTJ element and surrounded by the sidewall spacer at least on two sides.

### Claim 19 (depends on 11)

The semiconductor device of claim 11, wherein the second magnetic material includes cobalt (Co).

### Claim 20 (depends on 15)

The semiconductor device of claim 15, wherein the bottom electrode includes a second conductive layer and a second barrier layer, wherein the second barrier layer includes a fourth sublayer, a fifth sublayer on the fourth sublayer, and a sixth sublayer on the fifth sublayer, wherein each of the fourth, fifth, and sixth sublayers is disposed on a bottom and two sidewall surfaces of the second conductive layer, wherein the fifth sublayer includes a second magnetic material.
