# US 12,004,346 B2 · Microelectronic devices with nitrogen-rich insulative structures

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- Number: US 12,004,346 B2
- Document ID: US12004346B2
- Status: Granted
- Kind: B2
- Application number: 17/200,169
- Filed: 2021-03-12
- Published: 2022-09-15
- Granted: 2024-06-04
- Earliest claimed: 2021-03-12
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Swapnil Lengade; Jeremy Adams; Naiming Liu; Jeslin J. Wu; Kadir Abdul; Carlo Mendoza Orofeo
- Web page: https://patentgrep.com/patent/US12004346B2

## CPC

- H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 41/10: characterised by the top-view layout
- H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 43/10: characterised by the top-view layout
- H10P 14/6329: {using physical ablation of a target, e.g. physical vapour deposition or pulsed laser deposition}
- H10P 14/6336: {in the presence of a plasma [PECVD]}
- H10P 14/6339: {deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD}
- H10P 14/6682: {the compound being a silane, e.g. disilane, methylsilane or chlorosilane}
- H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz}
- H10B: ELECTRONIC MEMORY DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of forming a microelectronic device comprises forming a stack structure comprising a vertically alternating sequence of insulative structures and additional insulative structures, at least some of the additional insulative structures comprising silicon nitride having a ratio of nitrogen atoms to silicon atoms greater than about 1.58:1.00, forming openings through the stack structure, and forming cell pillar structures within the openings, the cell pillar structures individually comprising a semiconductor channel material vertically extending through the stack structure. Related methods, microelectronic devices, memory devices, and electronic systems are also described.

## Claims

### Claim 1

A microelectronic device, comprising:
a stack structure including an array region and a peripheral region horizontally neighboring the array region, the stack structure comprising:
a first region comprising first levels respectively comprising:
silicon oxide material within the array region and the peripheral region;
within the array region, conductive material vertically adjacent the silicon oxide material; and
within the peripheral region, silicon nitride material vertically adjacent the silicon oxide material and having a first refractive index and a first ratio of nitrogen atoms to silicon atoms greater than about 1.60:1.00; and
a second region vertically overlying the first region and including second levels respectively comprising:
the silicon oxide material within the array region and the peripheral region;
within the array region, the conductive material vertically adjacent the silicon oxide material; and
within the peripheral region, additional silicon nitride material vertically adjacent the silicon oxide material, the additional silicon nitride material having a second refractive index greater than the first refractive index and having a second ratio of nitrogen atoms to silicon atoms less than about 1.60:1.00; and
a third region vertically overlying the second region and including third levels respectively comprising:
the silicon oxide material within the array region and the peripheral region;
within the array region, the conductive material vertically adjacent the silicon oxide material; and
within the peripheral region, the silicon nitride material vertically adjacent the silicon oxide material; and
strings of memory cells vertically extending through the stack structure and horizontally confined within the array region of the stack structure.

### Claim 2 (depends on 1)

The microelectronic device of claim 1, wherein the second ratio of the nitrogen atoms to silicon atoms increases with an increasing vertical distance from a center of the stack structure.

### Claim 3 (depends on 1)

The microelectronic device of claim 1, wherein, within the array region, the stack structure is divided into block structures separated from one another and portions of the stack structure within the peripheral region by insulative slot structures, the block structures having the strings of memory cells within horizontal areas thereof.

### Claim 4 (depends on 3)

The microelectronic device of claim 3, further comprising, within the horizontal areas of the block structures, staircase structures laterally neighboring the strings of memory cells.