# US 12,003,216 B2 · Circuit device and oscillator > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,003,216 B2 - Document ID: US12003216B2 - Status: Granted - Kind: B2 - Application number: 17/562,065 - Filed: 2021-12-27 - Published: 2022-06-30 - Granted: 2024-06-04 - Earliest claimed: 2020-12-28 - Assignees: Seiko Epson Corporation - Applicants: Seiko Epson Corporation - Inventors: Takehiro Yamamoto - Web page: https://patentgrep.com/patent/US12003216B2 ## CPC - H03B 28/00: Generation of oscillations by methods not covered by groups H03B5/00 - H03B27/00, including modification of the waveform to produce sinusoidal oscillations (analogue function generators for performing computing operations G06G7/26; use of transformers for conversion of waveform in AC-AC converters H02M5/18) - G06F 1/022: {Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers (G06F1/025, G06F1/03 take precedence)} - H03H 9/19: consisting of quartz - H03B 2200/0034: including a buffer amplifier - H03B: GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS (generators adapted for electrophonic musical instruments G10H; masers or lasers H01S; generation of oscillations in plasma H05H) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P) ## Abstract A circuit device includes an oscillation circuit which is electrically coupled to a first node to electrically be coupled to one end of a resonator and a second node to electrically be coupled to another end of the resonator, and is configured to oscillate the resonator to generate an oscillation signal, and a waveform shaping circuit which is coupled to the first node, to which the oscillation signal is input from the first node, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal, and a duty adjustment circuit configured to supply the first node with a bias voltage which is variably adjusted based on adjustment data to thereby adjust a duty ratio of the clock signal. ## Claims ### Claim 1 A circuit device comprising: an oscillation circuit which is electrically coupled to a first node to electrically be coupled to one end of a resonator and a second node to electrically be coupled to another end of the resonator, the oscillation circuit being configured to oscillate the resonator to generate an oscillation signal, the oscillation circuit including: an oscillation capacitor having one end coupled to the first node; an oscillation resistor having: one end coupled to another end of the oscillation capacitor; and another end coupled to the second node; a stationary capacitance capacitor having one end coupled to the first node, a capacitance value of the stationary capacitance capacitor being fixed; and a variable capacitance element having one end coupled to another end of the stationary capacitance capacitor, a capacitance value of the variable capacitance element being variable; a waveform shaping circuit which is coupled to the first node, to which the oscillation signal is input from the first node, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal; and a duty adjustment circuit configured to: supply the first node with a bias voltage which is variably adjusted based on adjustment data to thereby adjust a duty ratio of the clock signal; and supply a reference voltage to the other end of the variable capacitance element. ### Claim 2 (depends on 1) The circuit device according to claim 1 further comprising: a nonvolatile memory configured to store the adjustment data, wherein the duty adjustment circuit generates the bias voltage of a voltage set in accordance with the adjustment data stored in the nonvolatile memory. ### Claim 3 (depends on 1) The circuit device according to claim 1, wherein a power supply voltage of the oscillation circuit is a voltage no lower than a power supply voltage of the waveform shaping circuit. ### Claim 4 (depends on 1) The circuit device according to claim 1, wherein the duty adjustment circuit includes a voltage-dividing circuit which has a plurality of resistors coupled in series between a power supply node and a ground node, and is configured to output a plurality of divisional voltages divided in voltage by the plurality of resistors, and a selection circuit configured to select any one of the divisional voltages as the bias voltage. ### Claim 5 (depends on 1) The circuit device according to claim 1, wherein a temperature compensation voltage is input to the one end of the variable capacitance element. ### Claim 6 (depends on 5) The circuit device according to claim 5, wherein the duty adjustment circuit includes a voltage-dividing circuit which has a plurality of resistors coupled in series between a power supply node and a ground node, and is configured to output a plurality of divisional voltages divided in voltage by the plurality of resistors, and a selection circuit configured to select a first divisional voltage which is one of the divisional voltages as the bias voltage, and select a second divisional voltage which is one of the divisional voltages as the reference voltage. ### Claim 7 (depends on 5) The circuit device according to claim 5, wherein denoting the temperature compensation voltage by VCMP and the reference voltage by VREF, the duty adjustment circuit supplies the reference voltage with which VCMP-VREF becomes higher than 0 V. ### Claim 8 (depends on 5) The circuit device according to claim 5, wherein denoting the temperature compensation voltage by VCMP and the reference voltage by VREF, the duty adjustment circuit supplies the reference voltage with which VCMP-VREF becomes no higher than 0 V. ### Claim 9 (depends on 1) The circuit device according to claim 1 further comprising: an output buffer circuit configured to buffer the clock signal, and then output an output clock signal to an outside. ### Claim 10 (depends on 1) An oscillator comprising: the circuit device according to claim 1; and the resonator. ### Claim 11 (depends on 1) The circuit device according to claim 1, wherein the bias voltage is higher than the reference voltage.