# US 12,003,181 B2 · Buck DC/DC converter, controller thereof and controlling method thereof, and electronic device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,003,181 B2 - Document ID: US12003181B2 - Status: Granted - Kind: B2 - Application number: 17/698,019 - Filed: 2022-03-18 - Published: 2022-09-22 - Granted: 2024-06-04 - Earliest claimed: 2021-03-22 - Assignees: Rohm Co., Ltd. - Applicants: Rohm Co., Ltd. - Inventors: Tsutomu Ishino - Web page: https://patentgrep.com/patent/US12003181B2 ## CPC - H02M 3/1588: {comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence)} - H02M 1/0009: {Devices or circuits for detecting current in a converter} - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - H02M 1/32: Means for protecting converters other than automatic disconnection - H02M 3/157: with digital control - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract The present disclosure relates to a buck DC/DC converter, a controller thereof and controlling method thereof, and an electronic device. A pulse modulator generates a pulse modulation signal such that an output of the buck DC/DC converter is pulse-modulated to approach a target state. An overcurrent detection circuit compares a low-side current flowing through a low-side transistor with a predetermined overcurrent threshold value to generate an overcurrent detection signal that is asserted when the low-side current is greater than the overcurrent threshold value. (i) In a first mode, the control pulse that is input to the driver circuit corresponds to the pulse modulation signal, and (ii) in a second mode, the control pulse takes a second level for a period during which the overcurrent detection signal is asserted and takes a first level during a fixed on time after the overcurrent detection signal is negated. ## Claims ### Claim 1 A controller, for a synchronous rectification type buck DC/DC converter including a high-side transistor and a low-side transistor, the controller comprising: a pulse modulator, generating a pulse modulation signal, wherein a first level and a second level of the pulse modulation signal are taken such that an output of the buck DC/DC converter is pulse-modulated to approach a target state, the first level instructing the high-side transistor to be turned on and the low-side transistor to be turned off, and the second level instructing the high-side transistor to be turned off and the low-side transistor to be turned on; an overcurrent detection circuit, comparing a low-side current flowing through the low-side transistor with a predetermined overcurrent threshold value to generate an overcurrent detection signal that is asserted when the low-side current is greater than the overcurrent threshold value; a switch control circuit, at least based on the overcurrent detection signal and the pulse modulation signal, generating a control pulse that takes a first level during a period when the high-side transistor should be on and the low-side transistor should be off, and takes a second level during a period when the high-side transistor should be off and the low-side transistor should be on; and a driver circuit, driving the high-side transistor and the low-side transistor in response to the control pulse, wherein (i) in a first mode, the control pulse corresponds to the pulse modulation signal, and (ii) in a second mode, the control pulse takes the second level for the period during which the overcurrent detection signal is asserted and takes the first level during a fixed on time after the overcurrent detection signal is negated. ### Claim 2 (depends on 1) The controller of claim 1, wherein the switch control circuit, in the second mode when the overcurrent detection signal is negated and if the pulse modulation signal is at the first level, maintains the second mode, and in the second mode when the overcurrent detection signal is negated and if the pulse modulation signal is at the second level, the second mode shifts to the first mode. ### Claim 3 (depends on 1) The controller of claim 1, wherein the switch control circuit shifts to the second mode when the overcurrent detection signal is asserted in the first mode. ### Claim 4 (depends on 1) The controller of claim 1, wherein the switch control circuit includes a timer circuit that operates with a transition of the control pulse to the second level as a trigger to measure the fixed on time, wherein when the overcurrent detection signal is negated, the pulse modulation signal is output as the control pulse, when the overcurrent detection signal is asserted, the control pulse is set as the second level, when the pulse modulation signal is at the first level and while the overcurrent detection signal is negated, the control pulse is set to the first level during the fixed on time, and when the pulse modulation signal is at the second level and while the overcurrent detection signal is negated, the pulse modulation signal is output as the control pulse. ### Claim 5 (depends on 4) The controller of claim 4, wherein the timer circuit includes: a capacitor; a variable current source, generating a current proportional to a difference between an input voltage and an output voltage of the buck DC/DC converter, and supplying the current to the capacitor; a switch, disposed in parallel with the capacitor; and a voltage comparator, comparing a voltage of the capacitor with a predetermined threshold voltage. ### Claim 6 (depends on 1) The controller of claim 1, wherein the overcurrent detection circuit compares a voltage across the low-side transistor with a threshold voltage corresponding to the overcurrent threshold value. ### Claim 7 (depends on 6) The controller of claim 6, wherein the overcurrent detection circuit includes: a first transistor and a current source, connected in series between a power supply line and a ground line connected to one end of the low-side transistor, wherein the current source is disposed between a gate and a drain of the first transistor; a second transistor and a first resistor, connected in series between the power supply line and a switching line connected to the other end of the low-side transistor, wherein a gate of the second transistor is connected to the gate of the first transistor; a third transistor, a second resistor and an impedance element, connected in series between the power supply line and the ground line, wherein a gate of the third transistor is connected to the gate of the first transistor; and a voltage comparator, comparing a voltage of a connection node of the first resistor and the second transistor with a voltage of a connection node of the second resistor and the third transistor. ### Claim 8 (depends on 6) The controller of claim 6, wherein the overcurrent detection circuit includes: a differential amplifier, including: a tail current source; an input differential pair having a PMOS transistor or a PNP bipolar transistor; and a resistor-load circuit with unbalanced impedance; and a voltage comparator, comparing voltages of two connection nodes of the input differential pair with the resistor-load circuit, wherein one of the input differential pair is connected to a first end of the low-side transistor, and the other of the input differential pair is connected to a second end of the low-side transistor. ### Claim 9 (depends on 6) The controller of claim 6, wherein the overcurrent detection circuit includes: a differential amplifier, including: a tail current source; an input differential pair having a PMOS transistor or a PNP bipolar transistor; a current mirror load; and an impedance element inserted between one of the input differential pair and the tail current source; and an output stage, binarizing voltages of the input differential pair and one of two connection nodes of the current mirror load. ### Claim 10 (depends on 1) The controller of claim 1, wherein when an input voltage of the buck DC/DC converter is higher, the fixed on time is shorter. ### Claim 11 (depends on 1) The controller of claim 1, wherein when an output voltage of the buck DC/DC converter is higher, the fixed on time is longer. ### Claim 12 (depends on 1) The controller of claim 1, wherein the fixed on time is inversely proportional to a difference between the input voltage and the output voltage of the buck DC/DC converter. ### Claim 13 (depends on 1) The controller of claim 1, wherein the controller is integrated on a semiconductor substrate. ### Claim 14 (depends on 1) A buck DC/DC converter, comprising the controller of claim 1. ### Claim 15 (depends on 1) An electronic device, comprising the controller of claim 1. ### Claim 16 A controller, for a synchronous rectification type buck DC/DC converter including a high-side transistor and a low-side transistor, the controller comprising: a pulse modulator, generating a pulse modulation signal, wherein a first level and a second level of the pulse modulation signal are taken such that an output of the buck DC/DC converter is pulse-modulated to approach a target state, the first level instructing the high-side transistor to be turned on and the low-side transistor to be turned off, and the second level instructing the high-side transistor to be turned off and the low-side transistor to be turned on; an overcurrent detection circuit, comparing a low-side current flowing through the low-side transistor with a predetermined overcurrent threshold value to generate an overcurrent detection signal that is asserted when the low-side current is greater than the overcurrent threshold value; a switch control circuit, at least based on the overcurrent detection signal and the pulse modulation signal, generating a control pulse that takes a first level during a period when the high-side transistor should be on and the low-side transistor should be off, and takes a second level during a period when the high-side transistor should be off and the low-side transistor should be on; and a driver circuit, driving the high-side transistor and the low-side transistor in response to the control pulse, wherein when the overcurrent detection signal is negated, the pulse modulation signal is output as the control pulse, when the overcurrent detection signal is asserted, the control pulse is set as the second level, when the pulse modulation signal is at the first level and while the overcurrent detection signal is negated, the control pulse is set to the first level during a fixed on time, and when the pulse modulation signal is at the second level and while the overcurrent detection signal is negated, the pulse modulation signal is output as the control pulse. ### Claim 17 A controlling method for a synchronous rectification type buck DC/DC converter including a high-side transistor and a low-side transistor, the controlling method comprising: generating a pulse modulation signal, wherein a first level and a second level of the pulse modulation signal are taken such that an output of the buck DC/DC converter is pulse-modulated to approach a target state, the first level instructing the high-side transistor to be turned on and the low-side transistor to be turned off, and the second level instructing the high-side transistor to be turned off and the low-side transistor to be turned on; comparing a low-side current flowing through the low-side transistor with a predetermined overcurrent threshold value to generate an overcurrent detection signal that is asserted when the low-side current is greater than the overcurrent threshold value; at least based on the overcurrent detection signal and the pulse modulation signal, generating a control pulse that takes a first level during a period when the high-side transistor should be on and the low-side transistor should be off, and takes a second level during a period when the high-side transistor should be off and the low-side transistor should be on; and driving the high-side transistor and the low-side transistor in response to the control pulse, wherein (i) in a first mode, the control pulse corresponds to the pulse modulation signal, and (ii) in a second mode, the control pulse takes the second level for the period during which the overcurrent detection signal is asserted and takes the first level during a fixed on time after the overcurrent detection signal is negated. ### Claim 18 (depends on 17) The controlling method of claim 17, wherein the fixed on time is inversely proportional to a difference between an input voltage and an output voltage of the buck DC/DC converter. ### Claim 19 A controlling method for a synchronous rectification type buck DC/DC converter including a high-side transistor and a low-side transistor, the controlling method comprising: generating a pulse modulation signal, wherein a first level and a second level of the pulse modulation signal are taken such that an output of the buck DC/DC converter is pulse-modulated to approach a target state, the first level instructing the high-side transistor to be turned on and the low-side transistor to be turned off, and the second level instructing the high-side transistor to be turned off and the low-side transistor to be turned on; comparing a low-side current flowing through the low-side transistor with a predetermined overcurrent threshold value to generate an overcurrent detection signal that is asserted when the low-side current is greater than the overcurrent threshold value; at least based on the overcurrent detection signal and the pulse modulation signal, generating a control pulse that takes a first level during a period when the high-side transistor should be on and the low-side transistor should be off, and takes a second level during a period when the high-side transistor should be off and the low-side transistor should be on; and driving the high-side transistor and the low-side transistor in response to the control pulse, wherein the generating of the control pulse includes: outputting the pulse modulation signal as the control pulse when the overcurrent detection signal is negated; setting the control pulse to the second level when the overcurrent detection signal is asserted; setting the control pulse to the first level during the fixed on time when the pulse modulation signal is at the first level and while the overcurrent detection signal is negated; outputting the pulse modulation signal as the control pulse when the pulse modulation signal is at the second level and while the overcurrent detection signal is negated. ### Claim 20 (depends on 19) The controlling method of claim 19, wherein the fixed on time is inversely proportional to a difference between an input voltage and an output voltage of the buck DC/DC converter.