# US 12,002,887 B2 · Array substrate and method for manufacturing the same, and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,002,887 B2 - Document ID: US12002887B2 - Status: Granted - Kind: B2 - Application number: 18/343,279 - Filed: 2023-06-28 - Published: 2023-10-26 - Granted: 2024-06-04 - Earliest claimed: 2017-12-12 - Assignees: Ordos Yuansheng Optoelectronics Co., Ltd.; Boe Technology Group Co., Ltd. - Applicants: Ordos Yuansheng Optoelectronics Co., Ltd.; Boe Technology Group Co., Ltd. - Inventors: Yanqing Chen; Jianyun Xie; Wei Li; Cheng Li; Pan Guo; Yanfeng Li; Weida Qin; Ning Wang - Web page: https://patentgrep.com/patent/US12002887B2 ## CPC - G02F 1/133388: {with constructional differences between the display region and the peripheral region} - H10D 30/6723: {having light shields} - G02F 1/136209: {Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element} - H10D 86/021: {of multiple TFTs} - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - H10D 86/60: wherein the TFTs are in active matrices - H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons - G02F 2201/56: Substrates having a particular shape, e.g. non-rectangular - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract The embodiments of the present disclosure provide an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a substrate, wherein the substrate has a display region and a peripheral region surrounding the display region, the display region has a plurality of pixels arranged in an array, and each of the plurality of pixels includes a light transmission region and a light shielding region, and a light shielding block covering at least a part of the light transmission region of at least one pixel close to the peripheral region of the plurality of pixels. ## Claims ### Claim 1 A display substrate comprising: a substrate including a display region and a peripheral region surrounding the display region, the display region having a plurality of pixels arranged in an array, and each of the plurality of pixels comprising a light transmission region and a light shielding region; and a light shielding block for defining the light transmission region and the light shielding region, an edge pixel located at boundary of the display region, wherein the edge pixel comprises at least three sub-pixels of different color, in one of the at least three sub-pixels, the light shielding block comprising a first portion, a second portion, and a third portion between the first portion and the second portion, the first, second, and third portions separated from each other. ### Claim 2 (depends on 1) The display substrate according to claim 1, wherein the first portion, the third portion, and the second portion are arranged orderly along a longitude direction of the one of the at least three sub-pixels. ### Claim 3 (depends on 1) The display substrate according to claim 1, wherein the light shielding block within each of the at least three sub-pixels has a same area. ### Claim 4 (depends on 1) The display substrate according to claim 1, wherein the first portion and the second portion are substantially symmetric with respect to the third portion. ### Claim 5 (depends on 1) The display substrate according to claim 1, wherein a ratio of an area of the light shielding block of the one of the at least three sub-pixels is negative correlated with a distance to the peripheral region. ### Claim 6 (depends on 1) The display substrate according to claim 1, wherein a ratio of an area of the light shielding block to an area of the one of the at least three sub-pixels close to the peripheral region is set as one of N values constituting an arithmetic progression, wherein 3≤N≤101, and wherein the arithmetic progression has a first item of 0 and a last item of 100%. ### Claim 7 (depends on 6) The display substrate according to claim 6, wherein an absolute value of a difference between the one of the N values and a desired set value depending on a shape of an edge of the display region is smaller than an absolute value of a difference between any other one of the N values and the desired set value. ### Claim 8 (depends on 6) The display substrate according to claim 6, wherein N is equal to 3, and wherein the arithmetic progressions are 0, 50%, 100%, respectively. ### Claim 9 (depends on 6) The display substrate according to claim 6, wherein N is equal to 4, and wherein the arithmetic progressions are 0, 33.3%, 66.6%, 100%, respectively. ### Claim 10 (depends on 6) The display substrate according to claim 6, wherein N is equal to 9, and wherein the arithmetic progression are 0, 12.5%, 25%, 37.5%, 50%, 62.5%, 75%, 87.5%, 100%, respectively. ### Claim 11 (depends on 1) The display substrate according to claim 1, further comprising: a thin film transistor located on the substrate and in the light shielding region, the thin film transistor comprising an active layer on the substrate; and a light shielding layer located between the active layer and the substrate, wherein the light shielding block is disposed on a same layer as the light shielding layer. ### Claim 12 (depends on 1) The display substrate according to claim 1, further comprising: a thin film transistor located on the substrate and in the light shielding region, the thin film transistor comprising an active layer, a gate electrode, and a gate dielectric layer therebetween, wherein the light shielding block is disposed on a same layer as the gate electrode. ### Claim 13 (depends on 1) The display substrate according to claim 1, further comprising: a thin film transistor located on the substrate and in the light shielding region, the thin film transistor comprising an active layer, a gate electrode, a gate dielectric layer therebetween, and a source/drain electrode disposed on the active layer, wherein the light shielding block is disposed on a same layer as the source/drain electrode. ### Claim 14 (depends on 1) The display substrate according to claim 1, wherein the display region has a non-rectangular shape. ### Claim 15 (depends on 1) The display substrate according to claim 1, wherein the light shielding block is absent in a region surrounded by boundary lines of sub-pixels of the plurality of pixels located in the display region. ### Claim 16 (depends on 1) A display device comprising the display substrate according to claim 1.