# US 12,002,877 B2 · Field effect transistors including quantum layers

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- Number: US 12,002,877 B2
- Document ID: US12002877B2
- Status: Granted
- Kind: B2
- Application number: 17/358,500
- Filed: 2021-06-25
- Published: 2021-12-30
- Granted: 2024-06-04
- Earliest claimed: 2020-06-26
- Assignees: The Research Foundation for The State University of New York
- Applicants: The Research Foundation for the State University of New York
- Inventors: Huamin Li; Fei Yao
- Web page: https://patentgrep.com/patent/US12002877B2

## CPC

- H10D 30/43: having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
- H10D 30/472: {having lower bandgap active layer formed on top of wider bandgap layer, e.g. inverted HEMT}
- H10D 30/01: Manufacture or treatment
- H10D 30/6729: {characterised by the electrodes}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 62/8303: {Diamond}
- H10D 62/116: {adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions}
- H10D 62/292: {Non-planar channels of IGFETs (resulting from the gate electrode dispositions, e.g. within trenches H10D64/512)}
- H10D 62/82: Heterojunctions
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D 62/882: {Graphene}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Field effect transistors (FET) including quantum layers. A FET may include a substrate, and an oxide layer disposed over the substrate. The oxide layer may include a first section and a second section positioned adjacent the first section. The FET may also include a first quantum layer disposed over the first section of the oxide layer, and a second quantum layer disposed over the second section of the oxide layer, and a first segment of the first quantum layer. Additionally, the FET may include a drain region disposed directly over a second segment the first quantum layer. The second segment of the first quantum layer may be positioned adjacent the first segment of the first quantum layer. The FET may further include a source region disposed over the second quantum layer, and a channel region formed over the second quantum layer, between the drain region and the source region.

## Claims

### Claim 1

A field effect transistor, comprising:
a substrate;
an oxide layer disposed at least partially over the substrate;
a quantum layer disposed over the oxide layer and the substrate, adjacent the oxide layer, the quantum layer further comprising:
a first portion disposed directly over the substrate;
a second portion formed opposite the first portion, the second portion disposed directly over the oxide layer; and
an intermediate portion formed between the first portion and the second portion;
a drain region disposed directly over the substrate adjacent the quantum layer;
a source region disposed over the quantum layer, opposite the drain region;
a channel region formed over the quantum layer, between the drain region and the source region; and
a gate formed within the channel region, the gate disposed over the quantum layer.

### Claim 2 (depends on 1)

The field effect transistor of claim 1, wherein the channel region is formed adjacent and offset from the oxide layer.

### Claim 3 (depends on 1)

The field effect transistor of claim 1, wherein the oxide layer includes an angled section extending toward the substrate layer, and
the intermediate portion includes an angled surface substantially corresponding to the angled section of the oxide layer.

### Claim 4 (depends on 1)

The field effect transistor of claim 1, wherein the channel region is disposed directly over the first portion of the quantum layer.

### Claim 5 (depends on 1)

The field effect transistor of claim 1, wherein the source region is disposed directly over the second portion of the quantum layer.

### Claim 6

A field effect transistor, comprising:
a substrate;
an oxide layer disposed at least partially over the substrate;
a quantum layer disposed over the oxide layer and the substrate, adjacent the oxide layer, the quantum layer further comprising:
a first portion disposed directly over the substrate;
a second portion formed opposite the first portion, the second portion disposed directly over the oxide layer; and
an intermediate portion formed between the first portion and the second portion;
a drain region disposed directly over the substrate adjacent the quantum layer; a source region disposed over the quantum layer, opposite the drain region; and
a channel region formed over the quantum layer, between the drain region and the source region, the channel region formed adjacent and offset from the oxide layer and further including:
an insulator layer disposed directly over the quantum layer, and
a top gate formed in the channel region and disposed directly over the insulator layer.

### Claim 7 (depends on 6)

The field effect transistor of claim 6, wherein the oxide layer includes an angled section extending toward the substrate layer, and the intermediate portion includes an angled surface substantially corresponding to the angled section of the oxide layer.

### Claim 8 (depends on 7)

The field effect transistor of claim 7, wherein the channel region is disposed directly over the first portion of the quantum layer.

### Claim 9 (depends on 7)

The field effect transistor of claim 7, wherein the source region is disposed directly over the second portion of the quantum layer.

### Claim 10

A field effect transistor, comprising:
a substrate;
an oxide layer disposed at least partially over the substrate;
a quantum layer disposed over the oxide layer and the substrate, adjacent the oxide layer;
a drain region disposed directly over the substrate adjacent the quantum layer;
a source region disposed over the quantum layer, opposite the drain region; and a channel region formed over the quantum layer, between the drain region and the source region;
wherein the quantum layer further comprises:
a first portion disposed directly over the substrate;
a second portion formed opposite the first portion, the second portion disposed directly over the oxide layer; and
an intermediate portion formed between the first portion and the second portion; and
wherein the oxide layer includes an angled section extending toward the substrate layer, and the intermediate portion includes an angled surface substantially corresponding to the angled section of the oxide layer.

### Claim 11 (depends on 10)

The field effect transistor of claim 10, wherein the channel region is formed adjacent and offset from the oxide layer.

### Claim 12 (depends on 11)

The field effect transistor of claim 11, wherein the channel region further comprises:
an insulator layer disposed directly over the quantum layer; and
a top gate disposed directly over the insulator layer.

### Claim 13 (depends on 11)

The field effect transistor of claim 11, wherein the channel region is disposed directly over the first portion of the quantum layer.

### Claim 14 (depends on 11)

The field effect transistor of claim 11, wherein the source region is disposed directly over the second portion of the quantum layer.