# US 12,002,854 B2 · Semiconductor device and method of manufacture

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- Number: US 12,002,854 B2
- Document ID: US12002854B2
- Status: Granted
- Kind: B2
- Application number: 17/520,983
- Filed: 2021-11-08
- Published: 2022-02-24
- Granted: 2024-06-04
- Earliest claimed: 2018-09-27
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Heng-Wen Ting; Kei-Wei Chen; Chii-Horng Li; Pei-Ren Jeng; Hsueh-Chang Sung; Yen-Ru Lee; Chun-An Lin
- Web page: https://patentgrep.com/patent/US12002854B2

## CPC

- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/0243: {using dummy structures having essentially the same shapes as the semiconductor bodies, e.g. to provide stability}
- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 84/0193: {the components including FinFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/853: {comprising FinFETs}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10D 30/6219: {characterised by the source or drain electrodes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device having an improved source/drain region profile and a method for forming the same are disclosed. In an embodiment, a method includes etching one or more semiconductor fins to form one or more recesses; and forming a source/drain region in the one ore more recesses, the forming the source/drain region including epitaxially growing a first semiconductor material in the one or more recesses at a temperature of 600° C. to 800° C., the first semiconductor material including doped silicon germanium; and conformally depositing a second semiconductor material over the first semiconductor material at a temperature of 300° C. to 600° C., the second semiconductor material including doped silicon germanium and having a different composition than the first semiconductor material.

## Claims

### Claim 1

A device comprising:
a fin extending from a substrate;
a gate stack over the fin;
a source/drain region in the fin adjacent the gate stack, the source/drain region comprising:
a first source/drain layer having a germanium concentration of that is lower than 40 atomic percent and having a thickness of less than 10 nm;
a second source/drain layer over the first source/drain layer, the second source/drain layer having a germanium concentration of 40 to 50 atomic percent and having a thickness that is less than 25 nm;
a third source/drain layer over the second source/drain layer, the third source/drain layer having a germanium concentration of 60 to 80 atomic percent;
a fourth source/drain layer over the third source/drain layer, the fourth source/drain layer having a germanium concentration that is less than 40 atomic percent, wherein each of the first source/drain layer, the second source/drain layer, the third source/drain layer and the fourth source/drain layer comprise facets, and wherein a topmost point of the first source/drain layer is lower than a bottommost point of the third source/drain layer and a bottommost point of the fourth source/drain layer; and
a source/drain contact contacting the source/drain region.

### Claim 2 (depends on 1)

The device of claim 1, wherein the first source/drain layer has a dopant concentration of less than 5×1020 atoms/cm3.

### Claim 3 (depends on 2)

The device of claim 2, wherein the second source/drain layer has a dopant concentration of greater than 6×1020 atoms/cm3, and wherein the third source/drain layer has a dopant concentration of greater than 8×1020 atoms/cm3.

### Claim 4 (depends on 1)

The device of claim 1, wherein a width of a topmost surface of the source/drain contact is greater than a width of a bottommost surface of the source/drain contact.

### Claim 5 (depends on 4)

The device of claim 4, further comprising the source/drain contact extending completely through the fourth source/drain layer to physically contact the third source/drain layer.

### Claim 6

A device comprising:
a gate stack over and along sidewalls of a first semiconductor fin; and
a source/drain region adjacent the gate stack, the source/drain region comprising:
a first source/drain layer having a germanium concentration in a range from 20 atomic percent to 40 atomic percent;
a second source/drain layer over the first source/drain layer, the second source/drain layer having a germanium concentration in a range from 40 atomic percent to 50 atomic percent;
a third source/drain layer over the second source/drain layer, the third source/drain layer having a germanium concentration in a range from 60 atomic percent to 80 atomic percent; and
a fourth source/drain layer over the third source/drain layer, the fourth source/drain layer having a germanium concentration that is less than 40 atomic percent, wherein each of the first source/drain layer, the second source/drain layer, the third source/drain layer and the fourth source/drain layer comprise facets, and wherein a bottommost point of the third source/drain layer and a bottommost point of the fourth source/drain layer are higher than a topmost point of the first source/drain layer.

### Claim 7 (depends on 6)

The device of claim 6, further comprising a source/drain contact extending through the fourth source/drain layer to physically contact the third source/drain layer.

### Claim 8 (depends on 6)

The device of claim 6, wherein the source/drain region comprises:
a first portion in the first semiconductor fin; and
a second portion in a second semiconductor fin adjacent the first semiconductor fin, wherein the third source/drain layer of the first portion is merged with the third source/drain layer of the second portion.

### Claim 9 (depends on 8)

The device of claim 8, wherein the third source/drain layer comprises a valley between the first portion of the source/drain region and the second portion of the source/drain region.

### Claim 10 (depends on 9)

The device of claim 9, wherein a distance between a topmost surface of the source/drain region and a bottommost point of the valley is greater than 5 nm.

### Claim 11 (depends on 9)

The device of claim 9, wherein a distance between a bottommost point of an inner facet of the merged third source/drain layer and a bottom of the first semiconductor fin is greater than 25 nm.

### Claim 12 (depends on 9)

The device of claim 9, wherein an angle between intersecting facets at a top surface of the source/drain region is less than 90 degrees.

### Claim 13 (depends on 6)

The device of claim 6, wherein the third source/drain layer has a dopant concentration greater than 8×1020 atoms/cm3, and wherein the fourth source/drain layer has a dopant concentration greater than 1×1020 atoms/cm3.

### Claim 14

A device comprising:
a fin protruding from a substrate;
a gate stack over a top surface and sidewalls of the fin; and
a source/drain region in the fin, wherein the source/drain region comprises:
a first semiconductor material having a dopant concentration of less than 5×1020 atoms/cm3;
a second semiconductor material over the first semiconductor material, the second semiconductor material having a dopant concentration greater than 6×1020 atoms/cm3; and
a third semiconductor material over the second semiconductor material, the third semiconductor material having a dopant concentration greater than 8×1020 atoms/cm3, wherein a first angle between intersecting facets at a top surface of the third semiconductor material is smaller than 90 degrees and larger than a second angle between intersecting facets at a top surface of the second semiconductor material, wherein the first angle is higher than and overlaps the second angle.

### Claim 15 (depends on 14)

The device of claim 14, further comprising:
a fourth semiconductor material over the third semiconductor material, wherein the fourth semiconductor material has a thickness of less than 10 nm; and
a source/drain contact extending through the fourth semiconductor material and in physical contact with the third semiconductor material.

### Claim 16 (depends on 14)

The device of claim 14, wherein a thickness of the first semiconductor material is in a range from 1 nm to 10 nm, and wherein the first semiconductor material has a germanium concentration that is in a range from 20 atomic percent to 40 atomic percent.

### Claim 17 (depends on 14)

The device of claim 14, wherein a thickness of the second semiconductor material is less than 25 nm, and wherein the second semiconductor material has a germanium concentration that is in a range from 40 to 50 atomic percent.

### Claim 18 (depends on 1)

The device of claim 1, wherein a height between a bottom surface of an outer facet of the source/drain region and a bottom of the fin is greater than 20 nm.

### Claim 19 (depends on 1)

The device of claim 1, wherein a major surface of the source/drain region in a first cross-section has a crystalline plane in the (100) plane.

### Claim 20 (depends on 19)

The device of claim 19, wherein a major surface of the source/drain region in a second cross-section has a crystalline plane in the (iii) plane, and wherein the first cross-section is different from the second cross-section.