# US 12,002,821 B2 · Display apparatus and method of manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,002,821 B2 - Document ID: US12002821B2 - Status: Granted - Kind: B2 - Application number: 17/358,640 - Filed: 2021-06-25 - Published: 2022-05-05 - Granted: 2024-06-04 - Earliest claimed: 2020-11-02 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Joongeol Kim; Seulki Kim; Youngjae Jeon; Hyunseong Kang; Seungrae Kim; Jongin Kim; Seokhwan Bang; Seungsok Son; Donghoon Shin; Kapsoo Yoon; Kwangsoo Lee; Woogeun Lee; Jaehyun Lee; Kisu Jin; Junewhan Choi; Jongmoo Huh; Jiyun Hong - Web page: https://patentgrep.com/patent/US12002821B2 ## CPC - H10W 90/00: Package configurations - H10D 86/0231: {using masks, e.g. half-tone masks} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - H10D 86/60: wherein the TFTs are in active matrices - H10K 59/124: Insulating layers formed between TFT elements and OLED elements - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls - H10K 59/1201: {Manufacture or treatment} - H10K 59/38: comprising colour filters or colour changing media [CCM] - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS ## Abstract A display apparatus includes a substrate including a display area and a peripheral area adjacent to the display area, a thin-film transistor located in the display area of the substrate and including a semiconductor layer and a gate electrode overlapping a channel region of the semiconductor layer, a conductive layer disposed between the substrate and the semiconductor layer and including a first electrode located in the display area of the substrate and a pad electrode located in the peripheral area of the substrate, and a first insulating layer disposed between the conductive layer and the semiconductor layer and having a first opening that exposes at least a portion of an upper surface of the pad electrode. ## Claims ### Claim 1 A display apparatus comprising: a substrate comprising a display area and a peripheral area adjacent to the display area; a thin-film transistor located in the display area of the substrate, and comprising: a semiconductor layer; and a gate electrode overlapping a channel region of the semiconductor layer; a conductive layer disposed between the substrate and the semiconductor layer, and comprising: a first electrode located in the display area of the substrate; and a pad electrode located in the peripheral area of the substrate, a first insulating layer disposed between the conductive layer and the semiconductor layer and having a first opening that exposes at least a portion of an upper surface of the pad electrode; a second insulating layer disposed on the gate electrode of the thin-film transistor and having a second opening coinciding with the first opening of the first insulating layer, the gate electrode being disposed between the second insulating layer and the substrate; and a pixel electrode disposed over the second insulting layer and electrically connected to the thin-film transistor. ### Claim 2 (depends on 1) The display apparatus of claim 1, further comprising a third insulating layer disposed on the second insulating layer and having a third opening coinciding with the first opening of the first insulating layer and the second opening of the second insulating layer, the third opening exposing the at least a portion of the upper surface of the pad electrode. ### Claim 3 (depends on 2) The display apparatus of claim 2, wherein the third insulating layer comprises: a first portion having a first thickness; and a second portion having a second thickness less than the first thickness of the first portion. ### Claim 4 (depends on 3) The display apparatus of claim 3, wherein the third opening is located in the second portion of the third insulating layer. ### Claim 5 (depends on 3) The display apparatus of claim 3, further comprising: a pixel defining layer disposed on the third insulating layer and exposing at least a portion of the pixel electrode, the pixel electrode being disposed on the first portion of the third insulating layer; an intermediate layer located on the at least a portion of the pixel electrode; and an opposite electrode disposed on the intermediate layer. ### Claim 6 (depends on 3) The display apparatus of claim 3, wherein the second insulating layer comprises: a first portion having a third thickness; and a second portion having a fourth thickness less than the third thickness of the first portion. ### Claim 7 (depends on 1) The display apparatus of claim 1 wherein the second opening of the second insulating layer comprises a lower opening portion and an upper opening portion, and an opening area of the upper opening portion is greater than an opening area of the lower opening portion in a plan view. ### Claim 8 (depends on 7) The display apparatus of claim 7, wherein the second insulating layer comprises: a lower sidewall that defines the lower opening portion; and an upper sidewall that defines the upper opening portion, and, the upper sidewall is disposed around the lower sidewall in a plan view. ### Claim 9 (depends on 7) The display apparatus of claim 7, further comprising a third insulating layer disposed on the second insulating layer and having a third opening that exposes the at least a portion of the upper surface of the pad electrode, wherein the lower opening portion of the second opening of the second insulating layer coincides with the first opening of the first insulating layer, and the upper opening portion of the second opening of the second insulating layer coincides with the third opening of the third insulating layer. ### Claim 10 (depends on 1) The display apparatus of claim 1, further comprising a third insulating layer disposed on the second insulating layer and having a third opening that defines a pad unit including a plurality of pad electrodes. ### Claim 11 (depends on 1) The display apparatus of claim 1, wherein the conductive layer further comprises a second electrode that at least partially overlaps the channel region of the semiconductor layer. ### Claim 12 (depends on 1) The display apparatus of claim 1, wherein the pad electrode includes: a first layer; and a second layer disposed on the first layer, and the first opening of the first insulating layer partially exposes the second layer of the pad electrode in a plan view. ### Claim 13 (depends on 1) The display apparatus of claim 1, wherein the gate electrode comprises: a lower gate electrode; and an upper gate electrode disposed on the lower gate electrode, the display apparatus further comprises a lower electrode layer including the lower gate electrode and a first pad connection electrode, and the first pad connection electrode is disposed over the first insulating layer and electrically contacts the pad electrode through the first opening of the first insulating layer. ### Claim 14 (depends on 13) The display apparatus of claim 13, wherein a width of the first pad connection electrode is greater than a width of the at least a portion of the pad electrode exposed by the first opening of the first insulating layer. ### Claim 15 (depends on 13) The display apparatus of claim 13, further comprising a gate insulating layer disposed between the semiconductor layer and the gate electrode, wherein a portion of the gate insulating layer is located between a portion of the first pad connection electrode and the first insulating layer. ### Claim 16 (depends on 15) The display apparatus of claim 15, further comprising a second insulating layer disposed on the thin-film transistor and having a second opening that exposes an upper surface of the first pad connection electrode and a portion of the gate insulating layer. ### Claim 17 (depends on 13) The display apparatus of claim 13, further comprising a second pad connection electrode disposed on the first pad connection electrode. ### Claim 18 (depends on 17) The display apparatus of claim 17, further comprising: a third insulating layer disposed to overlap the thin-film transistor in a plan view; and a pixel electrode layer including: the pixel electrode disposed on the third insulating layer; and the second pad connection electrode. ### Claim 19 (depends on 17) The display apparatus of claim 17, further comprising a third insulating layer disposed on the thin-film transistor, wherein the pixel electrode is disposed on the third insulating layer, the pixel electrode comprising an upper pixel electrode disposed on a lower pixel electrode, a first pixel electrode layer includes the lower pixel electrode and the second pad connection electrode, and a second pixel electrode layer includes the upper pixel electrode. ### Claim 20 A display apparatus comprising: a substrate comprising a display area and a peripheral area adjacent to the display area; a thin-film transistor located in the display area of the substrate, and comprising: a semiconductor layer; and a gate electrode overlapping a channel region of the semiconductor layer; a conductive layer disposed between the substrate and the semiconductor layer, and comprising: a first electrode located in the display area of the substrate; and a pad electrode located in the peripheral area of the substrate; and a first insulating layer disposed between the conductive layer and the semiconductor layer and having a first opening that exposes at least a portion of an upper surface of the pad electrode, wherein the first insulating layer comprises: a first portion having a first thickness; and a second portion having a second thickness less than the first thickness of the first portion, the first opening is located in the second portion of the first insulating layer, and the first portion is located around the second portion. ### Claim 21 (depends on 20) The display apparatus of claim 20, further comprising a second insulating layer disposed on the thin-film transistor and having a second opening coinciding with the first opening of the first insulating layer, wherein the second insulating layer includes: a first portion coinciding with the first portion of the first insulating layer; and a second portion coinciding with the second portion of the first insulating layer, and the second opening is located in the second portion of the second insulating layer. ### Claim 22 (depends on 21) The display apparatus of claim 21, wherein the second opening of the second insulating layer comprises a lower opening portion and an upper opening portion, and, an opening area of the upper opening portion is greater than an opening area of the lower opening portion in a plan view. ### Claim 23 A method of manufacturing a display apparatus, the method comprising: preparing a substrate comprising a display area and a peripheral area adjacent to the display area; forming a conductive layer on the substrate, the conductive layer comprising a first electrode located in the display area and a pad electrode located in the peripheral area; forming a first insulating layer on the conductive layer; forming a semiconductor layer on the first insulating layer, the semiconductor layer having a channel region that overlaps the first electrode; forming a gate insulating layer that overlaps the semiconductor layer in a plan view; forming an electrode layer on the gate insulating layer, the electrode layer including a gate electrode that overlaps the channel region of the semiconductor layer in a plan view; forming a second insulating layer on the electrode layer; the gate electrode being disposed between the second insulating layer and the substrate; and forming a pixel electrode over the second insulating layer. ### Claim 24 (depends on 23) The method of claim 23, further comprising: forming an opening in the second insulating layer at a location corresponding to the pad electrode; and then forming an opening in the first insulating layer to expose the pad electrode using the second insulating layer as an etch mask. ### Claim 25 (depends on 24) The method of claim 24, wherein a lateral surface of the opening in the second insulating layer and a lateral surface of the opening in the first insulating layer are disposed on a same etched surface.