# US 12,002,817 B2 · Display substrate, method for manufacturing same, and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,002,817 B2 - Document ID: US12002817B2 - Status: Granted - Kind: B2 - Application number: 17/604,971 - Filed: 2020-12-14 - Published: 2022-12-15 - Granted: 2024-06-04 - Earliest claimed: 2020-12-14 - Assignees: Chengou Boe Optoelectronics Technology Co., Ltd; Boe Technology Group Co., Ltd. - Applicants: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd. - Inventors: Ling Shi; Yipeng Chen; Ke Liu; Fei Fang; Zhenhua Zhang; Xuewei Tian - Web page: https://patentgrep.com/patent/US12002817B2 ## CPC - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/021: {of multiple TFTs} - H10D 86/60: wherein the TFTs are in active matrices - H10K 59/131: Interconnections, e.g. wiring lines or terminals - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES ## Abstract Provided is a display substrate. The display substrate includes including a base substrate having a first display region and a second display region; in the pixel circuit included in the pixels in the second display region, the conductive line connected to the metal layer is a transparent conductive line, and the transparent conductive line is disposed between the two existing insulating layers. ## Claims ### Claim 1 A display substrate, comprising: a base substrate having a first display region and a second display region, wherein the first display region is at least partially disposed around the second display region; and a plurality of pixels, each comprising a pixel circuit and a target electrode connected to each other, wherein the pixel circuit is disposed in one of the first display region and the second display region, and the target electrode is disposed in the second display region; and the pixel circuit comprises a first metal layer, a first insulating layer, at least one transparent conductive line, a second insulating layer, and a second metal layer which are disposed on a side of the base substrate and sequentially stacked, each of the at least one transparent conductive line being connected to one metal layer in the pixel circuit. ### Claim 2 (depends on 1) The display substrate according to claim 1, wherein the first metal layer is a first source-drain metal layer, the second metal layer is a second source-drain metal layer, the first insulating layer is a passivation layer, and the second insulating layer is a first planarization layer. ### Claim 3 (depends on 1) The display substrate according to claim 1, wherein a material of each of the at least one transparent conductive line is indium tin oxide. ### Claim 4 (depends on 1) The display substrate according to claim 1, wherein the target electrode is an anode. ### Claim 5 (depends on 1) The display substrate according to claim 1, wherein the pixel circuit is disposed in the second display region, and an orthographic projection of the pixel circuit on the base substrate is at least partially overlapped with an orthographic projection of the target electrode on the base substrate. ### Claim 6 (depends on 1) The display substrate according to claim 1, wherein the pixel circuit is disposed in the first display region, and the pixel circuit is connected to the target electrode through the transparent conductive line. ### Claim 7 (depends on 1) The display substrate according to claim 1, wherein the at least one transparent conductive line comprises a first transparent conductive line; wherein the first transparent conductive line is connected to the first metal layer and is configured to transmit a power signal, and the first transparent conductive lines in two adjacent pixel circuits disposed in the same column are integrally formed. ### Claim 8 (depends on 1) The display substrate according to claim 1, wherein the at least one transparent conductive line comprises a second transparent conductive line; wherein the second transparent conductive line is connected to the second metal layer and is configured to transmit a data signal, and the second transparent conductive lines in two adjacent pixel circuits disposed in the same column are integrally formed. ### Claim 9 (depends on 1) The display substrate according to claim 1, wherein the pixel circuit further comprises a third insulating layer disposed on a side of the second metal layer distal from the base substrate, and a transistor pattern layer, a third metal layer, a fourth metal layer, and a fourth insulating layer which are disposed between the base substrate and the first metal layer and sequentially stacked in a direction going away from the base substrate. ### Claim 10 (depends on 9) The display substrate according to claim 9, wherein the third insulating layer is a second planarization layer, the third metal layer is a first gate metal layer, the fourth metal layer is a second gate metal layer, and the fourth insulating layer is an interlayer dielectric layer. ### Claim 11 (depends on 10) The display substrate according to claim 10, wherein the third metal layer comprises a first portion, a second portion, and a third portion; the at least one transparent conductive line comprises a third transparent conductive line, a fourth transparent conductive line, and a fifth transparent conductive line; wherein the third transparent conductive line is connected to the first portion and is configured to transmit a light emission control signal, and the third transparent conductive lines in two adjacent pixel circuits disposed in the same row are integrally formed; the fourth transparent conductive line is connected to the second portion and is configured to transmit a gate driving signal, and the fourth transparent conductive lines in two adjacent pixel circuits disposed in the same row are integrally formed; and the fifth transparent conductive line is connected to the third portion and is configured to transmit a reset signal, and the fifth transparent conductive lines in two adjacent pixel circuits disposed in the same row are integrally formed. ### Claim 12 (depends on 11) The display substrate according to claim 11, wherein the at least one transparent conductive line comprises a sixth transparent conductive line; wherein the sixth transparent conductive line is connected to the fourth metal layer and is configured to transmit an initial signal, and the sixth transparent conductive lines in two adjacent pixel circuits disposed in the same row are integrally formed. ### Claim 13 (depends on 1) The display substrate according to claim 1, wherein the second display region is a light-transmitting display region. ### Claim 14 (depends on 1) The display substrate according to claim 1, wherein a resolution of the first display region is greater than or equal to a resolution of the second display region. ### Claim 15 (depends on 1) The display substrate according to claim 1, wherein each of the at least one transparent conductive line is connected to one metal layer in the pixel circuit through a via hole. ### Claim 16 (depends on 11) The display substrate according to claim 11, wherein the first metal layer is a first source-drain metal layer, the second metal layer is a second source-drain metal layer, the first insulating layer is a passivation layer, and the second insulating layer is a first planarization layer; a material of each of the at least one transparent conductive line is indium tin oxide; and the target electrode is an anode; in the case that the pixel circuit is disposed in the second display region, an orthographic projection of the pixel circuit on the base substrate is at least partially overlapped with an orthographic projection of the target electrode on the base substrate; and in the case that the pixel circuit is disposed in the first display region, the pixel circuit is connected to the target electrode through the transparent conductive line; and the at least one transparent conductive line comprises a first transparent conductive line, a second transparent conductive line, and a sixth transparent conductive line; wherein the first transparent conductive line is connected to the first metal layer and is configured to transmit a power signal, and the first transparent conductive lines in two adjacent pixel circuits disposed in the same column are integrally formed; the second transparent conductive line is connected to the second metal layer and is configured to transmit a data signal, and the second transparent conductive lines in two adjacent pixel circuits disposed in the same column are integrally formed; the sixth transparent conductive line is connected to the fourth metal layer and is configured to transmit an initial signal, and the sixth transparent conductive lines in two adjacent pixel circuits disposed in the same row are integrally formed; the second display region is a light-transmitting display region; a resolution of the first display region is greater than or equal to a resolution of the second display region; and each of the at least one transparent conductive line is connected to one metal layer in the pixel circuit through a via hole. ### Claim 17 A method for manufacturing a display substrate, comprising: providing a base substrate, wherein the base substrate has a first display region and a second display region, the first display region being at least partially disposed around the second display region; forming a plurality of pixels on a side of the base substrate, wherein each of the pixels comprises a pixel circuit and a target electrode connected to each other; wherein the pixel circuit is disposed in one of the first display region and the second display region, and the target electrode is disposed in the second display region; and the pixel circuit comprises a first metal layer, a first insulating layer, at least one transparent conductive line, a second insulating layer, and a second metal layer which are sequentially stacked in a direction going away from the base substrate, each of the at least one transparent conductive line being connected to one metal layer in the pixel circuit. ### Claim 18 A display device, wherein the display device comprises an integrated circuit and a display substrate comprising: a base substrate having a first display region and a second display region, wherein the first display region is at least partially disposed around the second display region; and a plurality of pixels, each comprising a pixel circuit and a target electrode connected to each other, wherein the pixel circuit is disposed in one of the first display region and the second display region, and the target electrode is disposed in the second display region; and the pixel circuit comprises a first metal layer, a first insulating layer, at least one transparent conductive line, a second insulating layer, and a second metal layer which are disposed on a side of the base substrate and sequentially stacked, each of the at least one transparent conductive line being connected to one metal layer in the pixel circuit; the integrated circuit is electrically connected to a transparent conductive line in a pixel circuit in the display substrate, and the integrated circuit is configured to provide a signal to the transparent conductive line. ### Claim 19 (depends on 18) The display device according to claim 18, wherein the display device further comprises a photosensitive sensor, wherein the photosensitive sensor is disposed in the second display region of the display substrate. ### Claim 20 (depends on 19) The display device according to claim 19, wherein the second display region is rectangular, and an area of an orthographic projection of the photosensitive sensor on the base substrate is less than or equal to an area of an inscribed circle of the second display region.