# US 12,002,771 B2 · Semiconductor device having a passivation layer and method of making

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- Number: US 12,002,771 B2
- Document ID: US12002771B2
- Status: Granted
- Kind: B2
- Application number: 17/319,641
- Filed: 2021-05-13
- Published: 2021-08-26
- Granted: 2024-06-04
- Earliest claimed: 2016-12-14
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Yu-Lung Shih; Chao-Keng Li; Alan Kuo; C. C. Chang; Yi-An Lin
- Web page: https://patentgrep.com/patent/US12002771B2

## CPC

- H10P 14/6334: {using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329)}
- H10P 14/6336: {in the presence of a plasma [PECVD]}
- H10P 14/69215: {the material being a silicon oxide, e.g. SiO2}
- H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz}
- H10W 20/098: {by filling between adjacent conductive parts}
- H10W 74/137: {the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence)}
- H10W 74/147: {the encapsulations being multilayered}
- H10W 72/012: {of bump connectors, dummy bumps or thermal bumps}
- H10W 72/019: {of bond pads}
- H10W 72/01953: {by etching}
- H10W 72/934: {Cross-sectional shape, i.e. in side view}
- H10W 72/941: {Dispositions of bond pads}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a conductive pad over an interconnect structure, wherein the conductive pad is electrically connected to an active device. The semiconductor device further includes a dielectric layer over the conductive pad, wherein the dielectric layer has a first conformity. The semiconductor device further includes a passivation layer over the dielectric layer, wherein the passivation layer has a second conformity different from the first conformity.

## Claims

### Claim 1

A method of making a semiconductor device, the method comprising:
depositing a dielectric layer over a conductive pad using a first deposition process; and
depositing a first passivation layer directly over the dielectric layer using a high density plasma chemical vapor deposition (HDPCVD), wherein the first deposition process is different from HDPCVD.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first deposition process comprises plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), atmospheric pressure chemical vapor deposition (APCVD), or atomic layer deposition (ALD).

### Claim 3 (depends on 1)

The method of claim 1, wherein depositing the dielectric layer comprises depositing the dielectric layer along sidewalls and over a top surface of the conductive pad.

### Claim 4 (depends on 3)

The method of claim 3, wherein depositing the dielectric layer includes depositing the dielectric layer over the sidewalls to a first thickness and over the top surface to a second thickness, and a difference between the first thickness and the second thickness ranges from about 5% to about 10%.

### Claim 5 (depends on 3)

The method of claim 3, wherein depositing the first passivation layer includes depositing the first passivation layer over the sidewalls to a first thickness and over the top surface to a second thickness, and a difference between the first thickness and the second thickness is less than about 3%.

### Claim 6 (depends on 1)

The method of claim 1, further comprising depositing a second passivation layer over the first passivation layer.

### Claim 7 (depends on 6)

The method of claim 6, wherein depositing the second passivation layer comprises depositing the second passivation layer using HDPCVD.

### Claim 8 (depends on 6)

The method of claim 6, wherein depositing the second passivation layer comprises depositing the second passivation layer using PECVD, LPCVD, APCVD, or ALD.

### Claim 9

A method of making a semiconductor device, the method comprising:
depositing a dielectric layer over a conductive pad, wherein the dielectric layer has a first conformity; and
depositing a first passivation layer directly over the dielectric layer, wherein the first passivation layer has a second conformity greater than the first conformity.

### Claim 10 (depends on 9)

The method of claim 9, further comprising forming the conductive pad over a substrate.

### Claim 11 (depends on 10)

The method of claim 10, wherein depositing the dielectric layer comprises depositing the dielectric layer over a portion of the substrate adjacent to the conductive pad.

### Claim 12 (depends on 10)

The method of claim 10, wherein depositing the first passivation layer comprises depositing the first passivation layer over a portion of the substrate adjacent to the conductive pad.

### Claim 13

A method of making a semiconductor device, the method comprising:
forming a plurality of conductive pads over a substrate;
depositing a dielectric layer over each of the plurality of conductive pads, wherein the dielectric layer has a first conformity; and
depositing a passivation layer over the dielectric layer, wherein the passivation layer has a second conformity, and the second conformity is different from the first conformity.

### Claim 14 (depends on 13)

The method of claim 13, wherein depositing the dielectric layer comprises depositing the dielectric layer using plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), atmospheric pressure chemical vapor deposition (APCVD), or atomic layer deposition (ALD).

### Claim 15 (depends on 13)

The method of claim 13, wherein depositing the passivation layer comprises depositing the passivation layer using a high density plasma chemical vapor deposition (HDPCVD).

### Claim 16 (depends on 13)

The method of claim 13, wherein depositing the dielectric layer comprises depositing the dielectric layer along sidewalls of each of the plurality of conductive pads.

### Claim 17 (depends on 13)

The method of claim 13, wherein depositing the dielectric layer comprises depositing the dielectric layer between adjacent conductive pads of the plurality of conductive pads.

### Claim 18 (depends on 13)

The method of claim 13, wherein depositing the dielectric layer includes depositing the dielectric layer over sidewalls of a first conductive pad of the plurality of conductive pads to a first thickness and over a top surface of the first conductive pad to a second thickness, and a difference between the first thickness and the second thickness ranges from about 5% to about 10%.

### Claim 19 (depends on 13)

The method of claim 13, wherein depositing the passivation layer includes depositing the passivation layer over sidewalls of a first conductive pad of the plurality of conductive pads to a first thickness and over a top surface of the first conductive pad to a second thickness, and a difference between the first thickness and the second thickness is less than about 3%.

### Claim 20 (depends on 13)

The method of claim 13, wherein depositing the dielectric layer comprises depositing silicon oxide, silicon nitride, or silicon oxynitride.