# US 12,002,752 B2 · Method for manufacturing a fuse component

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,002,752 B2
- Document ID: US12002752B2
- Status: Granted
- Kind: B2
- Application number: 17/541,745
- Filed: 2021-12-03
- Published: 2023-06-08
- Granted: 2024-06-04
- Earliest claimed: 2021-12-03
- Assignees: Nanya Technology Corporation
- Applicants: Nanya Technology Corporation
- Inventors: Kai-Po Shang; Jui-Hsiu Jao
- Web page: https://patentgrep.com/patent/US12002752B2

## CPC

- H10W 20/493: {Fuses, i.e. interconnections changeable from conductive to non-conductive}
- H10D 64/01: Manufacture or treatment
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10W 20/491: {Antifuses, i.e. interconnections changeable from non-conductive to conductive}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

The present disclosure provides a method for manufacturing a fuse component having a three-dimensional (3D) structure. The method includes providing an active region, forming a first recess region and a second recess region in the active region, disposing a fuse dielectric material in the first recess region and the second recess region, and filling the first recess region and the second recess region with a gate metal material.

## Claims

### Claim 1

A method of manufacturing a fuse component, comprising:
providing an active region;
forming a first recess region and a second recess region in the active region;
disposing a fuse dielectric material in the first recess region and the second recess region; and
filling the first recess region and the second recess region with a gate metal material;
wherein the first recess region and the second recess region are formed between a first isolation structure and a second isolation structure.

### Claim 2 (depends on 1)

The method of claim 1, wherein the active region is formed on a substrate and the active region comprises a higher doping concentration than the substrate, and wherein the first recess region is formed in a way such that the substrate is not exposed through the first recess region.

### Claim 3 (depends on 1)

The method of claim 1, wherein the fuse dielectric material is formed by an atomic layer deposition (ALD) process, a chemical vapor deposition (CVD) process, or a combination thereof.

### Claim 4 (depends on 1)

The method of claim 1, wherein disposing the fuse dielectric material comprises:
forming a first fuse dielectric layer and a second fuse dielectric layer spaced apart from the first fuse dielectric layer.

### Claim 5 (depends on 1)

The method of claim 1, wherein filling the first recess region and the second recess region with the gate metal material comprises:
forming a first gate metal layer and a second gate metal layer spaced apart from the first gate metal layer.

### Claim 6 (depends on 5)

The method of claim 5, further comprising:
electrically connecting the first gate metal layer with the second gate metal layer.

### Claim 7 (depends on 6)

The method of claim 6, further comprising:
forming a conductive plug electrically connected with the first gate metal layer.