# US 12,002,740 B2 · Printed circuit board, power semiconductor module arrangement comprising a printed circuit board, and method for assembling the same

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- Number: US 12,002,740 B2
- Document ID: US12002740B2
- Status: Granted
- Kind: B2
- Application number: 18/101,198
- Filed: 2023-01-25
- Published: 2023-07-27
- Granted: 2024-06-04
- Earliest claimed: 2022-01-27
- Assignees: Infineon Technologies AG
- Applicants: Infineon Technologies AG
- Inventors: Sebastian Michalski; Guido Bönig
- Web page: https://patentgrep.com/patent/US12002740B2

## CPC

- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H05K 1/0263: {High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board (H05K1/0293 takes precedence)}
- H05K 1/144: {Stacked arrangements of planar printed circuit boards}
- H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)}
- H10W 70/041: {Connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/658: {for devices provided for in groups H10D8/00 - H10D48/00}
- H10W 76/47: Solid or gel fillings
- H05K 1/0306: {Inorganic insulating substrates, e.g. ceramic, glass}
- H05K 2201/042: Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
- H05K 2201/10166: Transistor
- H05K 2201/1031: Surface mounted metallic connector elements
- H10W 40/255: {having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 76/15: Containers comprising an insulating or insulated base
- H10W 90/00: Package configurations
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

A printed circuit board including a dielectric insulation layer having a top side facing a first side and a bottom side opposite the first side that faces a second side of the dielectric insulation layer, at least one conducting track formed on the dielectric insulation layer, and one or more conductor rails, wherein each of the one or more conductor rails is mechanically coupled to the dielectric insulation layer, and a first portion of each of the one or more conductor rails is arranged on the first side and a second portion of each of the one or more conductor rails is arranged on the second side of the dielectric insulation layer.

## Claims

### Claim 1

A printed circuit board comprises:
a dielectric insulation layer having a top side facing a first side and a bottom side opposite the first side that faces a second side of the dielectric insulation layer;
at least one conducting track formed on the dielectric insulation layer; and
one or more conductor rails, wherein
each of the one or more conductor rails is mechanically coupled to the dielectric insulation layer, and
a first portion of each of the one or more conductor rails is arranged on the first side and a second portion of each of the one or more conductor rails is arranged on the second side of the dielectric insulation layer.

### Claim 2 (depends on 1)

The printed circuit board of claim 1, wherein each of the one or more conductor rails is bent at least once along its length such that it comprises at least one section extending in parallel to the dielectric insulation layer, and at least one section extending perpendicular to the dielectric insulation layer.

### Claim 3 (depends on 2)

The printed circuit board of claim 2, comprising a first conductor rail and a second conductor rail, wherein
a first section of the first conductor rail which extends in parallel to the dielectric insulation layer is arranged on the second side of the printed circuit board,
a first section of the second conductor rail which extends in parallel to the dielectric insulation layer is arranged on the first side of the printed circuit board, and
the dielectric insulation layer of the printed circuit board is arranged between the first section of the first conductor rail and the first section of the second conductor rail, thereby dielectrically insulating the first section of the first conductor rail from the first section of the second conductor rail.

### Claim 4 (depends on 1)

The printed circuit board of claim 1, wherein each of the one or more conductor rails comprises a metal plate having a length and a width that are at least 10 times larger than a thickness of the metal plate.

### Claim 5 (depends on 4)

The printed circuit board of claim 4, wherein each of the one or more conductor rails comprises one or more pins extending from the metal plate of the respective conductor rail through a through hole in the dielectric insulation layer, thereby holding the conductor rail in a desired position with regard to the dielectric insulation layer.

### Claim 6 (depends on 5)

The printed circuit board of claim 5, wherein each pin of each of the one or more conductor rails is soldered to the printed circuit board.

### Claim 7 (depends on 4)

The printed circuit board of claim 4, wherein the printed circuit board comprises at least one opening, and at least one of the one or more conductor rails extends through one of the at least one opening.

### Claim 8 (depends on 4)

The printed circuit board of claim 4, wherein the thickness of each of the metal plates is between 0.5 and 1.5 mm.

### Claim 9 (depends on 8)

The printed circuit board of claim 8, wherein the thickness of each of the metal plates is 1 mm.

### Claim 10 (depends on 1)

A power semiconductor module arrangement comprising,
a housing;
a substrate arranged inside the housing; and
a printed circuit board according to claim 1 arranged inside the housing, wherein a first end of each of the one or more conductor is electrically and mechanically coupled to the substrate, and a second end of each of the one or more conductor rails extends to the outside of the housing.

### Claim 11 (depends on 10)

The power semiconductor module arrangement of claim 10, further comprising at least one terminal element arranged inside the housing, wherein
each of the at least one terminal element is electrically and mechanically coupled either to the substrate or to the printed circuit board with a first end;
a second end of each of the at least one terminal element extends to the outside of the housing; and
each of the at least one terminal element is configured to conduct control signals to and from the substrate or the printed circuit board.

### Claim 12 (depends on 11)

The power semiconductor module arrangement of claim 11, wherein the control signals comprise electrical signals of 15V or less.

### Claim 13 (depends on 11)

The power semiconductor module arrangement of claim 11, wherein each of the at least one terminal element has a length between its first and second end that is at least ten times its greatest thickness.

### Claim 14 (depends on 10)

The power semiconductor module arrangement of claim 10, wherein each of the one or more conductor rails is configured to provide a supply voltage of more than 100V.

### Claim 15

A method comprising:
mechanically coupling one or more conductor rails to a printed circuit board; and
arranging the printed circuit board with the one or more conductor rails mechanically coupled thereto in a housing of a power semiconductor module arrangement, wherein
the printed circuit board comprises a dielectric insulation layer having a top side facing a first side and a bottom side opposite the first side that faces a second side of the dielectric insulation layer, and at least one conducting track formed on the dielectric insulation layer,
the one or more conductor rails are coupled to the printed circuit board such that a first portion of each of the one or more conductor rails is arranged on the first side and a second portion of each of the one or more conductor rails is arranged on the second side of the dielectric insulation layer, and
when the printed circuit board with the one or more conductor rails coupled thereto is arranged in the housing, a second end of each of the one or more conductor rails extends to the outside of the housing, and the method further comprises electrically and mechanically coupling a first end of each of the one or more conductor rails to the substrate.
