# US 12,002,727 B2 · Barrier structures for underfill containment

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- Number: US 12,002,727 B2
- Document ID: US12002727B2
- Status: Granted
- Kind: B2
- Application number: 16/788,186
- Filed: 2020-02-11
- Published: 2021-08-12
- Granted: 2024-06-04
- Earliest claimed: 2020-02-11
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Ziyin Lin; Vipul Mehta; Wei Li; Edvin Cetegen; Xavier Brun; Yang Guo; Soud Choudhury; Shan Zhong; Christopher Rumer; Nai-Yuan Liu; Ifeanyi Okafor; Hsin-Wei Wang
- Web page: https://patentgrep.com/patent/US12002727B2

## CPC

- H10W 74/141: {the encapsulations being on at least the sidewalls of the semiconductor body}
- H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections
- H10W 40/70: Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
- H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)}
- H10W 72/30: Die-attach connectors
- H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/00: Package configurations
- H10W 72/072: {of bump connectors}
- H10W 72/07302: {using an auxiliary member}
- H10W 72/225: {Bumps having a filler embedded in a matrix}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/253: {not comprising solid metals or solid metalloids, e.g. polymers or ceramics}
- H10W 72/325: {Die-attach connectors having a filler embedded in a matrix}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/353: {not comprising solid metals or solid metalloids, e.g. ceramics}
- H10W 72/354: {comprising polymers}
- H10W 72/387: {Flow barriers}
- H10W 72/551: {Materials of bond wires}
- H10W 72/877: {Bump connectors and die-attach connectors}
- H10W 72/925: {Bond pads having a filler embedded in a matrix}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/953: {not comprising solid metals or solid metalloids, e.g. polymers, ceramics or liquids}
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/753: {between laterally-adjacent chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An integrated circuit assembly may be formed comprising an electronic substrate, a first and second integrated circuit device each having a first surface, a second surface, at least one side extending between the first and second surface, and an edge defined at an intersection of the second surface and the at least one side of each respective integrated circuit device, wherein the first surface of each integrated circuit device is electrically attached to the electronic substrate, an underfill material between the first surface of each integrated circuit device and the electronic substrate, and between the sides of the first and second integrated circuit devices, and at least one barrier structure adjacent at least one of the edge of first integrated circuit device and the edge of the second integrated circuit device, wherein the underfill material abuts the at least one barrier structure.

## Claims

### Claim 1

An integrated circuit assembly, comprising:
an electronic substrate;
a first integrated circuit device having a first surface, an opposing second surface, a first side extending between the first surface and the second surface, and a first edge defined at an intersection of the second surface and the first side of the first integrated circuit device, wherein the first surface of the first integrated circuit device is electrically attached to the electronic substrate;
a second integrated circuit device having a first surface, an opposing second surface, and a second side extending between the first surface and the second surface, and a second edge defined at an intersection of the second surface and the second side of the second integrated circuit device, wherein the first surface of the second integrated circuit device is electrically attached to the electronic substrate;
an underfill material between the first side of the first integrated circuit device and the second side of the second integrated circuit device; and
a trench within at least one of the first side of the first integrated circuit device or the second surface of the second integrated circuit device, the trench adjacent to, but laterally spaced a first distance apart from, the first edge or second edge, wherein the underfill material does not fill the trench.

### Claim 2 (depends on 1)

The integrated circuit assembly of claim 1, wherein a height of the first integrated circuit device is greater than a height of the second integrated circuit device.

### Claim 3 (depends on 2)

The integrated circuit assembly of claim 2, wherein the trench is substantially free of the underfill material.

### Claim 4 (depends on 2)

The integrated circuit assembly of claim 2, wherein the trench is within the second surface of the second integrated circuit device and wherein, over at least a portion of the first distance, the underfill is in contact with the second surface of the second integrated circuit device.

### Claim 5 (depends on 1)

The integrated circuit assembly of claim 1, further comprising a heat dissipation device in thermal contact with the second surface of the first integrated circuit device and the second surface of the second integrated circuit device, and a thermal interface material between the first integrated circuit device and the heat dissipation device and between the second integrated circuit device and the heat dissipation device.

### Claim 6 (depends on 1)

The integrated circuit assembly of claim 1,
wherein the edge has a length, the trench extends along at least a majority of the length.

### Claim 7 (depends on 1)

The integrated circuit assembly of claim 1, wherein the at least one side is a first side, the edge is a first edge, the second surface comprises the trench within a first distance from the first edge, and the integrated circuit device comprises:
a second side, opposite the first side and extending between the first surface and the second surface; and
a second edge is defined at an intersection of the second surface and the second side, and wherein, within the first distance from the second edge, the trench is absent from the second surface.

### Claim 8 (depends on 1)

The integrated circuit assembly of claim 1, wherein the side of the integrated circuit device comprises the trench.

### Claim 9 (depends on 1)

The integrated circuit assembly of claim 1, wherein the second surface of the integrated circuit device comprises the trench.

### Claim 10

An electronic system, comprising:
a motherboard;
an integrated circuit assembly electrically attached to the motherboard, wherein the integrated circuit assembly comprises:
an electronic substrate;
a first integrated circuit device having a first surface, an opposing second surface, a first side extending between the first surface and the second surface, and a first edge defined at an intersection of the second surface and the first side of the first integrated circuit device, wherein the first surface of the first integrated circuit device is electrically attached to the electronic substrate;
a second integrated circuit device having a first surface, an opposing second surface, a second side extending between the first surface and the second surface, and a second edge defined at an intersection of the second surface and the second side of the second integrated circuit device, wherein the first surface of the second integrated circuit device is electrically attached to the electronic substrate,
an underfill material between the first side of the first integrated circuit device and the second side of the second integrated circuit device; and
at least one barrier structure comprising a silicone or fluorocarbon layer on the first side of the first integrated circuit device and adjacent the first edge or on the second surface of the second integrated circuit device and adjacent the second edge, wherein the underfill material abuts, but does not cross, the at least one barrier structure.

### Claim 11 (depends on 10)

The electronic system of claim 10, wherein a height of the first integrated circuit device is greater than a height of the second integrated circuit device.

### Claim 12 (depends on 10)

The electronic system of claim 10, wherein the at least one barrier structure is on the at least one side of the first integrated circuit device.

### Claim 13 (depends on 10)

The electronic system of claim 10, wherein the at least one barrier structure is on the second surface of the second integrated circuit device.