# US 12,002,724 B2 · Power module with metal substrate

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,002,724 B2
- Document ID: US12002724B2
- Status: Granted
- Kind: B2
- Application number: 17/842,302
- Filed: 2022-06-16
- Published: 2022-09-29
- Granted: 2024-06-04
- Earliest claimed: 2020-06-29
- Assignees: Infineon Technologies Austria AG
- Applicants: Infineon Technologies Austria AG
- Inventors: Wu Hu Li; Raphael Hellwig; Olaf Hohlfeld; Martin Mayer; Ivan Nikitin
- Web page: https://patentgrep.com/patent/US12002724B2

## CPC

- H10W 70/464: {Additional interconnections in combination with leadframes}
- H10W 70/6875: {being on a metallic substrate, e.g. insulated metal substrates [IMS]}
- H10W 70/041: {Connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps}
- H10W 70/042: {Etching}
- H10W 70/095: {of vias therein}
- H10W 70/635: {Through-vias}
- H10W 74/016: {using moulds}
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00}
- H10W 72/5438: {the bond wires having multiple connections on the same bond pad}
- H10W 72/5473: {multiple bond wires connected to a common bond pad}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/811: {Multiple chips on leadframes}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A power semiconductor module includes a substrate of planar sheet metal including a plurality of islands that are each defined by channels that extend between upper and lower surfaces of the substrate, a first semiconductor die mounted on a first one of the islands, a molded body of encapsulant that covers the metal substrate, fills the channels, and encapsulates the first semiconductor die, a hole in the molded body that extends to a recess in the upper surface of the substrate, and a press-fit connector arranged in the hole such an interior end of the press-fit connector is mechanically and electrically connected to the substrate.

## Claims

### Claim 1

A power semiconductor module, comprising:
a substrate of planar sheet metal comprising a plurality of islands that are each defined by channels that extend between upper and lower surfaces of the substrate;
a first semiconductor die mounted on a first one of the islands;
a molded body of encapsulant that covers the metal substrate, fills the channels, and encapsulates the first semiconductor die;
a hole in the molded body that extends to a recess in the upper surface of the substrate; and
a press-fit connector arranged in the hole such an interior end of the press-fit connector is mechanically and electrically connected to the substrate,
wherein the channels comprise a ring-shaped channel that surrounds each one of the islands and separates each one of the islands from a peripheral ring of the substrate.

### Claim 2 (depends on 1)

The power semiconductor module of claim 1, wherein the interior end of the press-fit connector is welded to the substrate.

### Claim 3 (depends on 1)

The power semiconductor module of claim 1, wherein the interior end of the press-fit connector is secured within the recess by mechanical pressure.

### Claim 4 (depends on 1)

The power semiconductor module of claim 1, further comprising a spring contact attachment feature formed in the substrate, the spring contact attachment feature comprising a tab of the planar sheet metal and a perforation in the tab that completely extends through the tab, wherein the tab and the perforation are exposed from the molded body, and wherein the tab of the planar sheet metal is connected with the peripheral ring of the substrate.

### Claim 5 (depends on 1)

The power semiconductor module of claim 1, wherein the lower surface of the substrate is exposed at a lower surface of the molded body, and wherein the power semiconductor module further comprises a layer of electrically insulating material that covers the lower surface of the substrate.

### Claim 6 (depends on 1)

The power semiconductor module of claim 1, wherein the recess is formed in a second one of the islands, wherein the first semiconductor die comprises a terminal which faces away from the upper surface of the substrate and is electrically connected to the second island by an electrical connector, and wherein the press-fit connector is configured as an externally accessible point of electrical contact to the terminal of the semiconductor die.

### Claim 7 (depends on 1)

The power semiconductor module of claim 1, further comprising:
a second semiconductor die mounted on a second one of the islands;
a plurality of the holes in the molded body and a plurality of the recesses in the upper surface of the substrate beneath each of the respective holes;
a plurality of the press-fit connectors;
wherein one of the press-fit connectors is arranged in each one of the holes and forms a mechanical and electrical connection between an interior end of the respective press-fit connector and the substrate,
wherein the first and second semiconductor dies are configured as power transistors, and
wherein the press-fit connectors are configured as externally accessible points of electrical contact to each terminal of the first and second semiconductor dies.