# US 12,002,719 B2 · Gapfill structure and manufacturing methods thereof

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,002,719 B2
- Document ID: US12002719B2
- Status: Granted
- Kind: B2
- Application number: 18/083,757
- Filed: 2022-12-19
- Published: 2023-04-20
- Granted: 2024-06-04
- Earliest claimed: 2020-08-12
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Sung-En Lin; Chi On Chui; Fang-Yi Liao; Chunyao Wang; Yung-Cheng Lu
- Web page: https://patentgrep.com/patent/US12002719B2

## CPC

- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates}
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10D 64/01318: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314)}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)}
- H10D 84/017: {Manufacturing their source or drain regions, e.g. silicided source or drain regions}
- H10D 84/0177: {the gate conductors having different materials or different implants}
- H10D 84/0184: {Manufacturing their gate sidewall spacers}
- H10D 84/0186: {Manufacturing their interconnections or electrodes, e.g. source or drain electrodes}
- H10D 84/0188: {Manufacturing their isolation regions}
- H10D 84/0193: {the components including FinFETs}
- H10D 84/853: {comprising FinFETs}
- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10W 10/021: {of air gaps}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W 10/20: Air gaps
- H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D 64/669: {the conductor further comprising additional layers of alloy material, compound material or organic material, e.g. TaN/TiAlN}
- H10D 84/0151: {Manufacturing their isolation regions}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method includes patterning a trench and depositing a first insulating material along sidewalls and a bottom surface of the trench using a conformal deposition process. Depositing the first insulating material includes forming a first seam between a first portion of the first insulating material on a first sidewall of the trench and a second portion of the first insulating material on a second sidewall of the trench. The method further includes etching the first insulating material below a top of the trench and depositing a second insulating material over the first insulating material and in the trench using a conformal deposition process. Depositing the second insulating material comprises forming a second seam between a first portion of the second insulating material on the first sidewall of the trench and a second portion of the second insulating material on a second sidewall of the trench.

## Claims

### Claim 1

A method comprising:
patterning a trench, the trench being disposed between a first semiconductor fin and a second semiconductor fin;
forming an isolation region in the trench, wherein forming the isolation region comprises performing, in the following order:
depositing a first insulating material in the trench, wherein depositing the first insulating material comprises forming a first seam within the first insulating material;
etching the first insulating material, wherein etching the first insulating material at least partially removes the first seam; and
depositing a second insulating material in the trench over the first insulating material, wherein depositing the second insulating material comprises forming a second seam within the second insulating material.

### Claim 2 (depends on 1)

The method of claim 1, wherein etching the first insulating material comprises completely removing the first seam.

### Claim 3 (depends on 1)

The method of claim 1, wherein after etching the first insulating material, a portion of the first seam remains.

### Claim 4 (depends on 1)

The method of claim 1, wherein depositing the first insulating material further comprises defining a void along the first seam.

### Claim 5 (depends on 1)

The method of claim 1, wherein the first insulating material has a lower k value than the second insulating material.

### Claim 6 (depends on 1)

The method of claim 1 further comprising:
etching the second insulating material below a top of the trench, wherein etching the second insulating material at least partially removes the second seam; and
depositing a third insulating material over the second insulating material and in the trench.

### Claim 7 (depends on 6)

The method of claim 6, wherein depositing the third insulating material comprises forming a third seam within the third insulating material.

### Claim 8 (depends on 7)

The method of claim 7, wherein the third insulating material has a same material composition as the second insulating material.

### Claim 9 (depends on 1)

The method of claim 1 further comprising after depositing the second insulating material, planarizing the isolation region to be at a same level as the first semiconductor fin and the second semiconductor fin.

### Claim 10

A method comprising:
patterning a first trench and a second trench in a semiconductor substrate to define a plurality of semiconductor fins, wherein the first trench is wider than the second trench;
depositing a first insulating material in the first trench and the second trench, wherein the first insulating material comprises silicon, oxygen, carbon, nitrogen, or a combination thereof;
etching the first insulating material below tops of the plurality of semiconductor fins; and
depositing a second insulating material over the first insulating material in the first trench and the second trench, wherein the second insulating material comprises a first seam in the first trench and a second seam in the second trench, and wherein the second seam extends closer to the first insulating material than the first seam.

### Claim 11 (depends on 10)

The method of claim 10, wherein the second insulating material comprises a metal oxide or a metal nitride.

### Claim 12 (depends on 10)

The method of claim 10, wherein etching the first insulating material comprises removing a seam of the first insulating material.

### Claim 13 (depends on 10)

The method of claim 10 further comprising:
etching the second insulating material in the first trench and the second trench; and
depositing a third material over the second insulating material in the first trench and the second trench.

### Claim 14 (depends on 13)

The method of claim 13, wherein etching the second insulating material fully removes the first seam.

### Claim 15

A device comprising:
a first fin and a second fin extending from a semiconductor substrate;
a first insulating material between the first fin and the second fin; and
a second insulating material between the first fin and the second fin and over the first insulating material, wherein the second insulating material has a higher k-value than the first insulating material, and wherein a top surface of the first insulating material extends continuously from a sidewall of the first fin to a sidewall of the second fin.

### Claim 16 (depends on 15)

The device of claim 15, wherein the first insulating material is free of any seams.

### Claim 17 (depends on 15)

The device of claim 15, wherein the first insulating material comprises a seam.

### Claim 18 (depends on 15)

The device of claim 15, further comprising:
a third fin on an opposite side of the first fin as the second fin, a spacing between the first fin and the second fin being less than a spacing between the first fin and the third fin;
a third insulating material between the first fin and the third fin, the third insulating material having a same material composition as the first insulating material; and
a fourth insulating material between the first fin and the third fin and over the third insulating material, wherein the fourth insulating material has a same material composition as the second insulating material, and wherein a first seam in the second insulating material extends lower than a second seam in the fourth insulating material.

### Claim 19 (depends on 15)

The device of claim 15, wherein the top surface of the first insulating material is concave.

### Claim 20 (depends on 15)

The device of claim 15 further comprising a third insulating material between the first insulating material and the second insulating material.