# US 12,002,683 B2 · Lateral etching of silicon

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- Number: US 12,002,683 B2
- Document ID: US12002683B2
- Status: Granted
- Kind: B2
- Application number: 17/713,723
- Filed: 2022-04-05
- Published: 2023-10-05
- Granted: 2024-06-04
- Earliest claimed: 2022-04-05
- Assignees: Tokyo Electron Limited
- Applicants: Tokyo Electron Limited
- Inventors: Hamed Hajibabaeinajafabadi; Pingshan Luan; Aelan Mosden; Sergey Voronin
- Web page: https://patentgrep.com/patent/US12002683B2

## CPC

- H10P 50/242: {of Group IV materials}
- H10P 50/283: {by chemical means}
- H10D 30/014: {of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors}
- H10D 30/0193: {by modifying properties of the stacked channels}
- H10D 30/031: {of thin-film transistors [TFT]}
- H10D 30/502: {characterised by the stacked channels}
- H10D 62/121: {oriented parallel to substrates}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10P 14/6316: {Formation by nitridation, e.g. nitridation of the substrate}
- H10P 14/6319: {Formation by plasma treatments, e.g. plasma oxidation of the substrate}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES

## Abstract

A method of processing a substrate that includes: positioning a substrate in a plasma processing chamber, the substrate including a layer stack of alternating layers of silicon (Si) layers and silicon-germanium (SiGe) layers, the substrate including a recess that exposes sidewalls of the Si layers and sidewalls of the SiGe layers; flowing a first process gas into the plasma processing chamber; while flowing the first process gas, pulsing a second process gas into the plasma processing chamber at a pulsing frequency; while flowing the first process gas and pulsing the second process gas, applying power to a source electrode and a bias electrode of the plasma processing chamber to generate a plasma in the plasma processing chamber; and exposing the substrate to the plasma to laterally etch a portion of the Si layers selectively to the SiGe layers and form indents between the SiGe layers.

## Claims

### Claim 1

A method of processing a substrate, the method comprising:
positioning a substrate in a plasma processing chamber, the substrate comprising a layer stack of alternating layers of silicon (Si) layers and silicon-germanium (SiGe) layers, the substrate comprising a recess that exposes sidewalls of the Si layers and sidewalls of the SiGe layers;
flowing a first process gas into the plasma processing chamber;
while flowing the first process gas, pulsing a second process gas into the plasma processing chamber at a pulsing frequency, the second process gas being different from the first process gas;
while flowing the first process gas and pulsing the second process gas, applying power to a source electrode and a bias electrode of the plasma processing chamber to generate a plasma in the plasma processing chamber; and
exposing the substrate to the plasma to laterally etch a portion of the Si layers selectively to the SiGe layers and form indents between the SiGe layers.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first process gas comprises nitrogen and the second process gas comprises fluorine.

### Claim 3 (depends on 1)

The method of claim 1, wherein the first process gas comprises N2 and H2, or the first process gas comprises NH3.

### Claim 4 (depends on 1)

The method of claim 1, wherein the second process gas comprises NF3, SF6, CF4, CHF3, CH2F2, or CH3F.

### Claim 5 (depends on 1)

The method of claim 1, wherein the plasma forms a passivation layer on surfaces of the SiGe layers, the surfaces of the SiGe layers comprising the sidewalls of the SiGe layers.

### Claim 6 (depends on 1)

The method of claim 1, wherein the pulsing frequency is between 0.01 Hz and 1 Hz.

### Claim 7 (depends on 1)

The method of claim 1, wherein a duty cycle of the pulsing is between 10% and 80%.

### Claim 8 (depends on 1)

The method of claim 1, wherein a ratio of a flow rate of the first process gas to a flow rate of the second process gas is between 5:1 and 100:1.

### Claim 9 (depends on 1)

The method of claim 1, wherein applying the power to the source electrode and the bias electrode to generate the plasma is performed when the second process gas is flowing into the plasma processing chamber.

### Claim 10 (depends on 1)

The method of claim 1, wherein applying the power to the source electrode and the bias electrode comprises applying power pulse trains.

### Claim 11

A method of processing a substrate, the method comprising:
forming a recess over a substrate, the substrate comprising a layer stack of alternating layers of silicon (Si) layers and silicon-germanium (SiGe) layers, the recess exposing sidewalls of the Si layers and sidewalls of the SiGe layers;
forming passivation layers on surfaces of the SiGe layers, the surfaces comprising the exposed sidewalls of the SiGe layers, the forming comprising
flowing a first component gas into a plasma processing chamber,
generating a first plasma within the plasma processing chamber, and
exposing the substrate to the first plasma; and
laterally etching a portion of the Si layers to form indents between the SiGe layers, the laterally etching comprising
flowing a second component gas into the plasma processing chamber,
generating a second plasma within the plasma processing chamber,
exposing the substrate to the second plasma, and
wherein the second plasma is different from the first plasma, and
wherein the passivation layers inhibit an etching of the SiGe layers by the second plasma.

### Claim 12 (depends on 11)

The method of claim 11, wherein the first component gas comprises N2 and H2, and the second component gas comprises NF3, SF6, CF4, CHF3, CH2F2, or CH3F.

### Claim 13 (depends on 11)

The method of claim 11, wherein the laterally etching further comprises continuously flowing the first component gas into the plasma processing chamber, and wherein the flowing of the second component gas into the plasma processing chamber is performed intermittently.

### Claim 14 (depends on 11)

The method of claim 11, wherein exposing the substrate to the first plasma is performed for a duration between 5 sec and 5 min.

### Claim 15 (depends on 11)

The method of claim 11, further comprising repeating the forming and the laterally etching.

### Claim 16

A method of processing a substrate, the method comprising:
forming a plurality of vertical recesses in a layer stack, the layer stacking being disposed over the substrate, the layer stack comprising alternating layers of a nanosheet layer comprising germanium (Ge) and a sacrificial layer comprising silicon (Si), the substrate further comprising a dummy gate formed over the layer stack, the plurality of vertical recesses exposing sidewalls of the nanosheet layer and sidewalls of the sacrificial layer;
exposing the substrate to a plasma comprising nitrogen within a plasma processing chamber to induce nitridation of a portion of surfaces of the nanosheet layer, the plasma being generated by flowing a first process gas comprising nitrogen to the plasma processing chamber;
while maintaining the plasma and flowing the first process gas, pulsing a second process gas comprising fluorine to the plasma processing chamber to supply fluorine to the plasma, wherein the plasma supplied with fluorine laterally etches a portion of the sacrificial layer and forms a plurality of lateral recesses between adjacent nanosheets;
depositing an inner sidewall spacer layer to fill the plurality of lateral recesses; and
etching a portion of the inner sidewall spacer layer to expose tips of the nanosheets, the remaining portion of the inner sidewall spacer layer forming an inner sidewall spacer.

### Claim 17 (depends on 16)

The method of claim 16, further comprising, before forming the plurality of vertical recesses, forming multi-layer spacers over the dummy gate.

### Claim 18 (depends on 16)

The method of claim 16, further comprising, after etching the portion of the inner sidewall spacer layer, epitaxially growing a semiconductor region from the exposed tips of the nanosheets.

### Claim 19 (depends on 16)

The method of claim 16, wherein the nanosheet layer is a silicon-germanium layer comprising 5-50% germanium.

### Claim 20 (depends on 16)

The method of claim 16, wherein the lateral recesses have a depth between 10 nm and 80 nm.