# US 12,002,420 B2 · Compensation circuit, driving method and display panel

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 12,002,420 B2
- Document ID: US12002420B2
- Status: Granted
- Kind: B2
- Application number: 18/051,286
- Filed: 2022-10-31
- Published: 2024-04-11
- Granted: 2024-06-04
- Earliest claimed: 2022-10-10
- Assignees: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Applicants: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Inventors: Yuwen Chen; Zhongzhi Shen
- Web page: https://patentgrep.com/patent/US12002420B2

## CPC

- G09G 3/3208: organic, e.g. using organic light-emitting diodes [OLED]
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage
- G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
- G09G 2310/0291: Details of output amplifiers or buffers arranged for use in a driving circuit
- G09G 2320/0223: Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
- G09G 2320/0233: Improving the luminance or brightness uniformity across the screen
- G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements
- G09G 2330/021: Power management, e.g. power saving
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

Embodiments of the present disclosure are directed to a compensation circuit, a driving method and a display panel. In the compensation circuit, the driving method and the display panel, the compensation circuit with a 6T2C (6 transistors and 2 capacitors) structure is used to compensate the threshold voltage of the driving transistor in the pixel.

## Claims

### Claim 1

A driving method for driving a compensation circuit, the compensation circuit comprising:
a dual-gate transistor, having a first gate electrically connected to a first node, a second gate electrically connected to a second node, a source electrically connected to a first power supply terminal, and a drain electrically connected to a third node;
a light emitting device, electrically connected between the third node and a second power supply terminal;
a first transistor, having a gate receiving a first control signal, a source receiving a data signal, and a drain electrically connected to the first node;
a second transistor, having a gate receiving the first control signal, a source receiving a writing signal, and a drain electrically connected to the third node;
a third transistor, having a gate receiving a second control signal, a source of receiving a first reset signal, and a drain electrically connected to the second node
a fourth transistor, having a gate receiving a third control signal, a source receiving a second reset signal, and a drain electrically connected to the third node;
a fifth transistor, having a gate receiving the second control signal, a source electrically connected to the first node, and a drain electrically connected to the third node;
a first capacitor, connected between the second node and the third node; and
a second capacitor, connected between the first node and the third node;
wherein the driving method comprises:
in a first reset stage, turning on the fourth transistor in response to the third control signal such that the second reset signal is output to the third node to reset the light-emitting device, and turning off the third transistor and the fifth transistor in response to the second control signal;
in a second reset stage, turning on the third transistor and the fifth transistor in response to the second control signal such that the first reset signal is output to the second node and the first reset signal is output to the second node to maintain the voltage level of the first node to be identical to the voltage level of the third node, and turning on the fourth transistor in response to the third control signal such that and the second reset signal continues to be output to the third node;
in a compensation stage, turning on the third transistor in response to the second control signal such that the first reset signal continues to be output to the second node, turning off the fourth transistor in response to the third control signal, turning on the fifth transistor in response to the second control signal to maintain the voltage level of the first node to be identical to the voltage level of the third node, and utilizing a first power supply terminal to charge the third node until a voltage difference between the second node and the third node is equal to a threshold voltage of a dual gate transistor;
in a writing stage, turning on the first transistor and the second transistor in response to the first control signal such that the data signal is output to the first node and the writing signal is output to the third node; and
in a light emitting stage, utilizing the light-emitting device to emit light.

### Claim 2 (depends on 1)

The driving method according to claim 1, further comprising:
in a buffer stage, slowly decreasing the second control signal decreased from a high voltage level to a low voltage level;
wherein the buffer stage is between the compensation stage and the writing stage.

### Claim 3 (depends on 1)

The driving method according to claim 1, wherein the double-gate transistor, the first, second, third, fourth and fifth transistors are low temperature polysilicon thin-film transistors, oxide semiconductor thin-film transistors or amorphous silicon thin-film transistors.

### Claim 4 (depends on 3)

The driving method according to claim 3, wherein the double-gate transistor, and the first, second, third, fourth and fifth transistors are the same type transistors.

### Claim 5 (depends on 1)

The driving method according to claim 1, wherein current flowing through the light emitting device is independent of a threshold voltage of the dual gate transistor.