# US 12,002,414 B2 · Display panel and display device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,002,414 B2 - Document ID: US12002414B2 - Status: Granted - Kind: B2 - Application number: 18/187,707 - Filed: 2023-03-22 - Published: 2023-07-20 - Granted: 2024-06-04 - Earliest claimed: 2021-04-28 - Assignees: Xiamen Tlanma Micro-Electronics Co., Ltd. - Applicants: Xiamen Tianma Micro-Electronics Co., Ltd. - Inventors: Jieliang Li; Ping An - Web page: https://patentgrep.com/patent/US12002414B2 ## CPC - G09G 3/32: semiconductive, e.g. using light-emitting diodes [LED] - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 3/3291: in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/60: wherein the TFTs are in active matrices - G09G 2300/0426: Layout of electrodes and connections - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2310/0216: Interleaved control phases for different scan lines in the same sub-field, e.g. initialization, addressing and sustaining in plasma displays that are not simultaneous for all scan lines - G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage - G09G 2310/061: for resetting or blanking - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data write device, a drive device and a bias adjustment device. The pixel circuit further includes a reset device or an initialization device. The display panel further includes a bias adjustment signal line, the bias adjustment signal line is connected to the bias adjustment device and configured to provide a bias adjustment signal; and at least one of a reset signal line or an initialization signal line, the reset signal line is connected to the reset device and configured to provide a reset signal, or the initialization signal line is connected to the initialization device and configured to provide an initialization signal. At least one side frame of the display panel includes a bias adjustment signal bus, at least one of a reset signal bus or an initialization signal bus. ## Claims ### Claim 1 A display panel, comprising: a pixel circuit and a light-emitting element; wherein the pixel circuit comprises a data write device, a drive device and a bias adjustment device; the pixel circuit further comprises at least one of a reset device or an initialization device; wherein the display panel further comprises: a bias adjustment signal line, the bias adjustment signal line is connected to the bias adjustment device and configured to provide a bias adjustment signal; and at least one of a reset signal line or an initialization signal line, the reset signal line is connected to the reset device and configured to provide a reset signal, or the initialization signal line is connected to the initialization device and configured to provide an initialization signal; wherein, at least one side frame of the display panel comprises: a bias adjustment signal bus, the bias adjustment signal line is connected to the bias adjustment signal bus; at least one of a reset signal bus or an initialization signal bus, the reset signal line is connected to the reset signal bus, or the initialization signal line is connected to the initialization signal bus; and wherein, the bias adjustment signal bus and the reset signal bus are disposed in a same layer, and the bias adjustment signal line and the reset signal line are disposed in different layers; or, the bias adjustment signal bus and the initialization signal bus are disposed in a same layer, and the bias adjustment signal line and the initialization signal line are disposed in different layers. ### Claim 2 (depends on 1) The display panel according to claim 1, wherein the bias adjustment signal bus is disposed in a first side frame of the display panel, the reset signal bus or the initialization signal bus is disposed in a second side frame of the display panel, the first side frame is adjacent to the second side frame, or is opposite to the second side frame. ### Claim 3 (depends on 2) The display panel according to claim 2, wherein the display panel comprises a side frame of long sides and a side frame of short sides; and wherein, the first side frame and the second side frame are the side frames of long sides of the display panel, and the first side frame is opposite to the second side frame, the display panel comprises a side frame of long sides and a side frame of short sides; and wherein, the first side frame and the second side frame are the side frames of long sides of the display panel, and the first side frame is opposite to the second side frame. ### Claim 4 (depends on 1) The display panel according to claim 1, wherein the bias adjustment signal bus and the reset signal bus are disposed in a same side frame of the display panel; or, the bias adjustment signal bus and the initialization signal bus are disposed in a same side frame of the display panel. ### Claim 5 (depends on 1) The display panel according to claim 1, wherein the pixel circuit comprises a first light-emitting control device, the first light-emitting control device is connected between a first power supply voltage signal line and the drive device, and the first power supply voltage signal line is configured to transmit a first power supply voltage signal; and wherein, a width of the bias adjustment signal line is lower than a width of the first power supply voltage signal line. ### Claim 6 (depends on 5) The display panel according to claim 5, wherein the bias adjustment signal line and the first power supply voltage signal line extend in a same direction. ### Claim 7 (depends on 5) The display panel according to claim 5, wherein the bias adjustment signal line and the first power supply voltage signal line are disposed in a same layer; or, the bias adjustment signal line and the first power supply voltage signal line are disposed in different layers. ### Claim 8 (depends on 1) The display panel according to claim 1, wherein the bias adjustment signal line and the reset signal line extend in a same direction; or, the bias adjustment signal line and the initialization signal line extend in a same direction. ### Claim 9 (depends on 1) The display panel according to claim 1, wherein the display panel comprises a side frame of long sides and a side frame of short sides; and wherein, an extension direction of the bias adjustment signal line is parallel to an extension direction of the side frame of short sides of the display panel. ### Claim 10 (depends on 1) The display panel according to claim 1, wherein the bias adjustment signal bus is disposed in two or more side frames of the display panel. ### Claim 11 (depends on 1) The display panel according to claim 1, wherein the display panel comprises a first metal layer, a second metal layer and a third metal layer; the bias adjustment signal bus and the reset signal bus are disposed in the first metal layer; the bias adjustment signal line is disposed in the second metal layer; and the reset signal line is disposed in the third metal layer. ### Claim 12 (depends on 11) The display panel according to claim 11, wherein the display panel comprises at least one of: the bias adjustment signal line is connected to the bias adjustment signal bus through a via hole; or, the reset signal line is connected to the reset signal bus through a via hole. ### Claim 13 (depends on 1) The display panel according to claim 1, wherein the display panel comprises a first metal layer and a second metal layer; the bias adjustment signal bus, the reset signal bus and the bias adjustment signal line are disposed in the first metal layer; and the reset signal line is disposed in the second metal layer. ### Claim 14 (depends on 13) The display panel according to claim 13, wherein the reset signal line is connected to the reset signal bus through a via hole. ### Claim 15 (depends on 1) The display panel according to claim 1, wherein the bias adjustment signal bus is disposed in a side closer to the display region than the reset signal bus. ### Claim 16 (depends on 1) The display panel according to claim 1, wherein the display panel comprises a first metal layer and a second metal layer; the bias adjustment signal bus, the reset signal bus and the reset signal line are disposed in the first metal layer; and the bias adjustment signal line is disposed in the second metal layer. ### Claim 17 (depends on 16) The display panel according to claim 16, wherein the bias adjustment signal line is connected to the bias adjustment signal bus through a via hole. ### Claim 18 (depends on 1) The display panel according to claim 1, wherein the reset signal bus is disposed in a side closer to the display region than the bias adjustment signal bus. ### Claim 19 (depends on 1) The display panel according to claim 1, wherein the drive device comprises a drive transistor; the data write device is connected to a source of the drive transistor; the bias adjustment device is connected between the source of the drive transistor and the bias adjustment signal line or between a drain of the drive transistor and the bias adjustment signal line. ### Claim 20 A display device, comprising a display panel, wherein the display panel, comprises: a pixel circuit and a light-emitting element; wherein the pixel circuit comprises a data write device, a drive device and a bias adjustment device; the pixel circuit further comprises at least one of a reset device or an initialization device; wherein the display panel further comprises: a bias adjustment signal line, the bias adjustment signal line is connected to the bias adjustment device and configured to provide a bias adjustment signal; and at least one of a reset signal line or an initialization signal line, the reset signal line is connected to the reset device and configured to provide a reset signal, or the initialization signal line is connected to the initialization device and configured to provide an initialization signal; wherein, at least one side frame of the display panel comprises: a bias adjustment signal bus, the bias adjustment signal line is connected to the bias adjustment signal bus; at least one of a reset signal bus or an initialization signal bus, the reset signal line is connected to the reset signal bus, or the initialization signal line is connected to the initialization signal bus; and wherein, the bias adjustment signal bus and the reset signal bus are disposed in a same layer, and the bias adjustment signal line and the reset signal line are disposed in different layers; or, the bias adjustment signal bus and the initialization signal bus are disposed in a same layer, and the bias adjustment signal line and the initialization signal line are disposed in different layers.