# US 12,001,880 B2 · Multi-core system and method of controlling operation of the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,001,880 B2 - Document ID: US12001880B2 - Status: Granted - Kind: B2 - Application number: 16/822,373 - Filed: 2020-03-18 - Published: 2021-01-14 - Granted: 2024-06-04 - Earliest claimed: 2019-07-11 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Bumgyu Park; Jonglae Park - Web page: https://patentgrep.com/patent/US12001880B2 ## CPC - G06F 9/4881: {Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues} - G06F 9/30083: {Power or thermal control instructions} - G06F 9/4837: {time dependent} - G06F 9/485: {Task life-cycle, e.g. stopping, restarting, resuming execution (G06F9/4881 takes precedence)} - G06F 9/4893: {taking into account power or heat criteria (power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206)} - G06F 9/5027: {the resource being a machine, e.g. CPUs, Servers, Terminals} - G06F 9/5038: {considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration (scheduling strategies G06F9/4881 and subgroups)} - G06F 9/505: {considering the load} - G06F 9/542: {Event management; Broadcasting; Multicasting; Notifications} - G06F 9/546: {Message passing systems or structures, e.g. queues} - G06F 11/3024: {where the computing system component is a central processing unit [CPU]} - G06F 11/3419: {by assessing time} - G06F 11/3433: {for load management (allocation of a server based on load conditions G06F9/505; load rebalancing G06F9/5083; redistributing the load in a network by a load balancer H04L67/1029)} - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract A method of controlling an operation of a multi-core system including a plurality of processor cores, includes, monitoring task execution delay times with respect to tasks respectively assigned to the plurality of processor cores, monitoring core execution delay times with respect to the plurality of processor cores and controlling an operation of the multi-core system based on the task execution delay times and the core execution delay times. ## Claims ### Claim 1 A method of controlling an operation of a system on chip (SoC) including a processor comprising a plurality of processor cores, the method comprising: the processor executing a kernel of an operating system to monitor a task queue of each of the processor cores for determining a task execution delay time for each task among a plurality of tasks respectively assigned to the plurality of processor cores, to generate a plurality of task execution delay times; determining, by the kernel, a core execution delay time for each core among the plurality of processor cores from a single time among the task execution delay times associated with the tasks assigned to the corresponding core, to generate a plurality of core execution delay times, wherein the single time is a largest time among the task execution delay times associated with the tasks assigned to the corresponding core; determining, by the kernel, whether a delay has occurred in a first processor core among the processor cores based on the core execution delay time of the first processor core; outputting, by the kernel, a control request to a performance controller of the SoC when the kernel determines the delay has occurred; and increasing, by the performance controller, a power level of the first processor core in response to receipt of the control request. ### Claim 2 (depends on 1) The method of claim 1, wherein the task execution delay time of a given task of the tasks assigned to a given processor core of the processor cores corresponds to a standby time while the given task is not executed by the given processor core after the given task is stored in a task queue of the given processor core. ### Claim 3 (depends on 2) The method of claim 2, wherein the task execution delay time of the given task corresponds to a start standby time from a time point when the given task is stored in the task queue to a start time point when the given processor core starts executing the given task. ### Claim 4 (depends on 2) The method of claim 2, wherein the task execution delay time of the given task corresponds to a sum of a start standby time from a time point when the given task is stored in the task queue to a start time point when the given processor core starts executing of the given task and a stall time while the given processor core stops executing the given task after the start time point. ### Claim 5 (depends on 1) The method of claim 1, wherein increasing the power level of the first processor core comprises: increasing an operation frequency of the first processor core. ### Claim 6 (depends on 1) The method of claim 1, further comprises: increasing a scheduling period of at least one of the processor cores when it is determined that the task execution delay or the core execution delay has occurred for at least one of the processor cores. ### Claim 7 (depends on 1) The method of claim 1 further comprises: determining whether a task execution delay has occurred with respect to a given task of the tasks assigned to a given processor core of the processor cores or whether a core execution delay has occurred with respect to the given processor core, based on the task execution delay time of the given task and the core execution delay time of the given processor core; and increasing a scheduling period of the given processor core when it is determined that the task execution delay has occurred for the given task or the core execution delay has occurred for the given processor core. ### Claim 8 A method of controlling an operation of a system on chip (SoC) including a processor comprising a plurality of processor cores, the method comprising: the processor executing a kernel of an operating system to monitor a task queue of each of the processor cores for determining a task execution delay time for each task among a plurality of tasks respectively assigned to the plurality of processor cores, to generate a plurality of task execution delay times; determining, by the kernel, a core execution delay time for each core among the plurality of processor cores from a single time among the task execution delay times associated with the tasks assigned to the corresponding core, to generate a plurality of core execution delay times, wherein the single time is a largest time among the task execution delay times associated with the tasks assigned to the corresponding core; determining, by the kernel, whether a delay has occurred in a first processor core among the processor cores based on the core execution delay time of the first processor core; and relocating, by the kernel, a given task of the tasks assigned to the first processor core to a second other processor core among the processor cores when it is determined that the delay has occurred. ### Claim 9 (depends on 8) The method of claim 8, wherein the relocating comprises: dividing the tasks assigned to the first processor core into an urgent task group and a normal task group based on latency requirement levels of the tasks; and relocating one of the urgent task group and the normal task group to the second processor core. ### Claim 10 (depends on 8) The method of claim 8, wherein the task execution delay time of a given task of the tasks assigned to a given processor core of the processor cores corresponds to a standby time while the given task is not executed by the given processor core after the given task is stored in a task queue of the given processor core. ### Claim 11 (depends on 10) The method of claim 10, wherein the task execution delay time of the given task corresponds to a start standby time from a time point when the given task is stored in the task queue to a start time point when the given processor core starts executing the given task. ### Claim 12 (depends on 10) The method of claim 10, wherein the task execution delay time of the given task corresponds to a sum of a start standby time from a time point when the given task is stored in the task queue to a start time point when the given processor core starts executing of the given task and a stall time while the given processor core stops executing the given task after the start time point. ### Claim 13 A method of controlling an operation of a system on chip (SoC) including a processor comprising a plurality of processor cores, the method comprising: the processor executing a kernel of an operating system to monitor a task queue of each of the processor cores for determining a task execution delay time for each task among a plurality of tasks respectively assigned to the plurality of processor cores, to generate a plurality of task execution delay times; determining, by the kernel, a core execution delay time for each core among the plurality of processor cores from a single time among the task execution delay times associated with the tasks assigned to the corresponding core, to generate a plurality of core execution delay times, wherein the single time is a largest time among the task execution delay times associated with the tasks assigned to the corresponding core; determining, by the kernel, whether a delay has occurred in a first processor core among the processor cores based on the core execution delay time of the first processor core; and increasing, by the kernel, a scheduling period of the first processor core when it is determined that the delay has occurred. ### Claim 14 (depends on 13) The method of claim 13, wherein the task execution delay time of a given task of the tasks assigned to a given processor core of the processor cores corresponds to a standby time while the given task is not executed by the given processor core after the given task is stored in a task queue of the given processor core. ### Claim 15 (depends on 14) The method of claim 14, wherein the task execution delay time of the given task corresponds to a start standby time from a time point when the given task is stored in the task queue to a start time point when the given processor core starts executing the given task. ### Claim 16 (depends on 15) The method of claim 15, wherein the task execution delay time of the given task corresponds to a sum of a start standby time from a time point when the given task is stored in the task queue to a start time point when the given processor core starts executing of the given task and a stall time while the given processor core stops executing the given task after the start time point.