# US 12,001,879 B2 · Instruction offload to processor cores in attached memory > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,001,879 B2 - Document ID: US12001879B2 - Status: Granted - Kind: B2 - Application number: 18/175,281 - Filed: 2023-02-27 - Published: 2023-06-29 - Granted: 2024-06-04 - Earliest claimed: 2019-08-16 - Assignees: Red Hat, Inc. - Applicants: Red Hat, Inc. - Inventors: Ulrich Drepper - Web page: https://patentgrep.com/patent/US12001879B2 ## CPC - G06F 9/3836: {Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution} - G06F 9/4856: {resumption being on a different machine, e.g. task migration, virtual machine migration (G06F9/5088 takes precedence)} - G06F 9/30145: {Instruction analysis, e.g. decoding, instruction word fields} - G06F 9/34: Addressing or accessing the instruction operand or the result {; Formation of operand address; Addressing modes (address translation G06F12/00)} - G06F 9/5016: {the resource being the memory} - G06F 9/5044: {considering hardware capabilities} - G06F 9/505: {considering the load} - G06F 2209/509: Offload - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract A first processing device receives a request to execute a program, determines that an amount of memory modified by one or more instructions of the program satisfies a threshold criterion, and provides the one or more instructions to a second processing device for execution, wherein the second processing device implements an instruction set architecture of the first processing device. ## Claims ### Claim 1 A method comprising: receiving, by a first processing device, a request to execute a program; determining that an amount of memory modified by one or more instructions of the program satisfies a threshold criterion; and providing the one or more instructions to a second processing device for execution, wherein the second processing device implements an instruction set architecture of the first processing device. ### Claim 2 (depends on 1) The method of claim 1, further comprising: detecting an indication to execute the one or more instructions; and responsive to detecting the indication to execute the one or more instructions, causing, by the first processing device, the second processing device to execute the one or more instructions. ### Claim 3 (depends on 1) The method of claim 1, further comprising: determining that a number of operations performed by the one or more instructions satisfies a threshold number. ### Claim 4 (depends on 1) The method of claim 1, wherein providing the one or more instructions to the second processing device further comprises: determining a memory space updated by the one or more instructions; and determining a memory module associated with at least a portion of the memory space, wherein the memory module comprises the second processing device. ### Claim 5 (depends on 4) The method of claim 4, wherein providing the one or more instructions to the second processing device comprises at least one of copying the one or more instructions to a memory area of the memory module, or sending a memory location of the one or more instructions to the memory module. ### Claim 6 (depends on 2) The method of claim 2, wherein causing the second processing device to execute the one or more instructions comprises at least one of sending a request to the second processing device to execute the one or more instructions, or modifying an area of memory of a memory module comprising the second processing device to cause the second processing device to execute the one or more instructions. ### Claim 7 (depends on 1) The method of claim 1, further comprising: receiving a notification from the second processing device that indicates that the one or more instructions are not to be executed by the second processing device; and executing the one or more instructions by the first processing device. ### Claim 8 (depends on 1) The method of claim 1, further comprising: receiving a notification from the second processing device that indicates that the one or more instructions have been executed by the second processing device. ### Claim 9 (depends on 8) The method of claim 8, further comprising: providing the one or more instructions to a third processing device for execution; responsive to detecting an indication to execute the one or more instructions, sending a second notification to the third processing device to cause the third processing device to execute the one or more instructions; and receiving a third notification from the third processing device that indicates that the one more instructions have been executed by the third processing device. ### Claim 10 A system comprising: a memory comprising one or more memory modules; and a first processing device, operatively coupled to the memory, to: receive a request to execute a program; determine that an amount of memory modified by one or more instructions of the program satisfies a threshold criterion; and provide the one or more instructions to a second processing device for execution, wherein the second processing device implements an instruction set architecture of the first processing device. ### Claim 11 (depends on 10) The system of claim 10, wherein the first processing device is further to: detect an indication to execute the one or more instructions; and responsive to detecting the indication to execute the one or more instructions, cause the second processing device to execute the one or more instructions. ### Claim 12 (depends on 10) The system of claim 10, wherein the first processing device is further to: determine that a number of operations performed by the one or more instructions satisfies a threshold number. ### Claim 13 (depends on 10) The system of claim 10, wherein to provide the one or more instructions to the second processing device, the first processing device is further to: determine a memory space updated by the one or more instructions; and determine a memory module associated with at least a portion of the memory space, wherein the memory module comprises the second processing device. ### Claim 14 (depends on 13) The system of claim 13, wherein to provide the one or more instructions to the second processing device, the first processing device is further to perform at least one of copying the one or more instructions to a memory area of the memory module, or sending a memory location of the one or more instructions to the memory module. ### Claim 15 (depends on 11) The system of claim 11, wherein to cause the second processing device to execute the one or more instructions, the first processing device is further to perform at least one of sending a request to the second processing device to execute the one or more instructions, or modifying an area of memory of a memory module comprising the second processing device to cause the second processing device to execute the one or more instructions. ### Claim 16 A non-transitory computer readable medium comprising instructions, which when accessed by a first processing device, cause the first processing device to: receive a request to execute a program; determine that an amount of memory modified by one or more instructions of the program satisfies a threshold criterion; and provide the one or more instructions to a second processing device for execution, wherein the second processing device implements an instruction set architecture of the first processing device. ### Claim 17 (depends on 16) The non-transitory computer readable medium of claim 16, wherein the first processing device is further to: detect an indication to execute the one or more instructions; and responsive to detecting the indication to execute the one or more instructions, cause the second processing device to execute the one or more instructions. ### Claim 18 (depends on 16) The non-transitory computer readable medium of claim 16, wherein to provide the one or more instructions to the second processing device, the first processing device is further to: determine a memory space updated by the one or more instructions; and determine a memory module associated with at least a portion of the memory space, wherein the memory module comprises the second processing device. ### Claim 19 (depends on 18) The non-transitory computer readable medium of claim 18, wherein to provide the one or more instructions to the second processing device, the first processing device is further to perform at least one of copying the one or more instructions to a memory area of the memory module, or sending a memory location of the one or more instructions to the memory module. ### Claim 20 (depends on 17) The non-transitory computer readable medium of claim 17, wherein to cause the second processing device to execute the one or more instructions, the first processing device is further to perform at least one of sending a request to the second processing device to execute the one or more instructions, or modifying an area of memory of a memory module comprising the second processing device to cause the second processing device to execute the one or more instructions.