# US 12,001,706 B2 · Predictive sanitization of an array of memory with capacitive cells and/or ferroelectric cells

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- Number: US 12,001,706 B2
- Document ID: US12001706B2
- Status: Granted
- Kind: B2
- Application number: 17/854,639
- Filed: 2022-06-30
- Published: 2023-07-27
- Granted: 2024-06-04
- Earliest claimed: 2022-01-21
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Marco Sforzin; Angelo Visconti; Giorgio Servalli; Daniele Balluchi; Paolo Amato
- Web page: https://patentgrep.com/patent/US12001706B2

## CPC

- G06F 3/0652: {Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket}
- G11C 29/52: Protection of memory contents; Detection of errors in memory contents
- G06F 3/0616: {in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]}
- G06F 3/0673: {Single storage device}
- G11C 2029/0409: {Online test}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

Provided is a computing system including a memory system in communication with a host, to store data therein. The memory system includes a memory having a plurality of memory components coupled to the controller via a memory interface; and a memory controller configured to communicate with the memory to control data transmission and performing scrubbing operation of the memory components and detecting a region of the memory to be sanitized and performing a sanitization operation of the detected region to prevent the occurrence of failure.

## Claims

### Claim 1

A computing system comprising:
a memory system in communication with a host, and configured to store data therein, the memory system comprising:
a memory including a plurality of memory components coupled to a memory controller via a memory interface; and
the memory controller configured to communicate with the memory to control data transmission and configured to: (i) perform a scrubbing operation of the memory components, and (ii) detect a region of the memory to be sanitized and perform a sanitization operation of the detected region to prevent the occurrence of failure;
wherein the memory controller is further configured to, when detecting the region of the memory to be sanitized:
(a) determine any regions that are about to cross a minimum window limit having a threshold reference, to observe any error for correction and write back data to prevent an accumulation of errors; and
(b) reduce a margin of the minimum window limit and predict whether the detected region will have at least one error in the future.

### Claim 2 (depends on 1)

The computing system of claim 1, wherein during detection, the memory controller is further configured to perform a special read operation using a special reference voltage (VREF) different from a reference voltage (VREF) used during a routine read operation to be performed by the memory controller.

### Claim 3 (depends on 2)

The computing system of claim 2, wherein when the scrubbing operation is performed on a specific area of a memory component of the plurality of memory components, the scrubbing operation is interpreted by the memory component as a read operation performed with the special VREF.

### Claim 4 (depends on 3)

The computing system of claim 3, wherein the memory controller is further configured to select the special VREF between a set of VREF values.

### Claim 5 (depends on 3)

The computing system of claim 3, wherein after detecting the region to be sanitized, the memory controller is further configured to replace a detected region to be sanitized by temporarily copying data from the detected region to a replacement location.

### Claim 6 (depends on 5)

The computing system of claim 5, wherein the replacement location is one or more convenience registers of the memory controller.

### Claim 7 (depends on 3)

The computing system of claim 3, wherein after detecting the region to be sanitized within a memory component of the plurality of memory components, the memory component is configured to replace the detected region to be sanitized by temporarily copying data from the detected region to a replacement location within the memory component.

### Claim 8 (depends on 7)

The computing system of claim 7, wherein when the detected region is a die, the replacement location is a replacement die of the memory controller.

### Claim 9 (depends on 3)

The computing system of claim 3, wherein the sanitization operation of the detected region is performed by fast cycling of the detected region.

### Claim 10 (depends on 9)

The computing system of claim 9, wherein the memory controller is further configured to schedule or postpone the sanitization operation based on current data traffic by assigning a time-out period to the detected region to be sanitized.

### Claim 11 (depends on 10)

The computing system of claim 10, wherein a length of time of the time-out period depends on the special VREF used for the detection.

### Claim 12 (depends on 11)

The computing system of claim 11, wherein once the sanitization operation is complete, the memory controller is configured to re-address the data back to the sanitized, detected region.

### Claim 13

A predictive sanitization method performed via a memory system, the method comprising:
performing a scrubbing operation of memory components of a memory in the memory system;
detecting a region of the memory to be sanitized; and
performing a sanitization operation of the detected region to prevent the occurrence of failure;
wherein detecting the region of the memory to be sanitized comprises:
determining any regions that are about to cross a minimum window limit having a threshold reference, to observe any error for correction and write back data to prevent an accumulation of errors; and
reducing a margin of the minimum window limit and predicting whether the detected region will have at least one error in the future.

### Claim 14 (depends on 13)

The method of claim 13, wherein performing the sanitization operation comprises:
re-enlarging the minimum window limit of the detected region and performing sanitization operation of the detected region while temporarily moving data therein to a replacement location.

### Claim 15 (depends on 14)

The method of claim 14, further comprising performing re-enablement of the detected region by re-addressing data back to the sanitized, detected region upon completing of the sanitization operation.

### Claim 16

A memory system comprising:
a memory including a plurality of memory components coupled to a memory controller via a memory interface;
wherein the memory controller is configured to communicate with the memory to control data transmission and configured to: (i) perform a scrubbing operation of the memory components, and (ii) detect a region of the memory to be sanitized and perform a sanitization operation of the detected region to prevent the occurrence of failure;
wherein the memory controller is further configured to, when detecting the region of the memory to be sanitized:
(a) determine any regions that are about to cross a minimum window limit having a threshold reference, to observe any error for correction and write back data to prevent an accumulation of errors; and
(b) reduce a margin of the minimum window limit and predict whether the detected region will have at least one error in the future.

### Claim 17 (depends on 16)

The memory system of claim 16, wherein after detecting the region to be sanitized, the memory controller is configured to replace a detected region to be sanitized by temporarily copying data from the detected region to a replacement location.

### Claim 18 (depends on 16)

The memory system of claim 16, wherein the memory controller is configured to schedule or postpone the sanitization operation based on current data traffic by assigning a time-out period to the detected region to be sanitized.

### Claim 19 (depends on 18)

The memory system of claim 18, wherein once the sanitization operation is complete, the memory controller is configured to re-address the data back to the sanitized, detected region.