# US 12,001,676 B2 · Storage device and host for the same

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- Number: US 12,001,676 B2
- Document ID: US12001676B2
- Status: Granted
- Kind: B2
- Application number: 18/152,655
- Filed: 2023-01-10
- Published: 2023-05-11
- Granted: 2024-06-04
- Earliest claimed: 2016-09-01
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Jeong Hur; Jae-Gyu Lee; Young-Moon Kim
- Web page: https://patentgrep.com/patent/US12001676B2

## CPC

- G06F 3/0607: {by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device}
- G06F 3/0622: {in relation to access}
- G06F 3/0632: {by initialisation or re-initialisation of storage systems}
- G06F 3/0637: {Permissions}
- G06F 3/0655: {Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 3/0688: {Non-volatile semiconductor memory arrays}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A storage device includes a storage device communicably connected to a host; a nonvolatile memory configured to store calibration data of the host; and a calibration circuit configured to receive a descriptor from the host including the setting information and update the calibration data with the received setting information.

## Claims

### Claim 1

A Universal Flash Storage (UFS) device communicably connected to a host, the UFS device comprising:
a device interface connected to the host configured to exchange data and commands with the host and include a link layer and a PHY layers;
a flash memory configured to store calibration data of the host; and
a device controller comprising:
a central processing unit (CPU);
a flash translation layer(FTL);
a flash manager configured to store the data in a selected address of the flash memory by referring to address mapping information of the FTL;
a command manager configured to receive the commands via the device interface;
a calibration manager configured to receive a descriptor in a command received from the host including setting information, update the calibration data with the setting information via the CPU, the FTL and the flash manager, and change a setting value of a register included in the link layer and the PHY layer based on the updated calibration data.

### Claim 2 (depends on 1)

The UFS device of claim 1, wherein the descriptor includes at least one of a host identifier (ID) for the host requiring a setting change, an event requiring a setting change, an address of a functional block requiring the setting change, a setting value to be written to the address, and an option for performing the setting change.

### Claim 3 (depends on 1)

The UFS device of claim 1, wherein the calibration manager is configured to receive a password from the host, and update the calibration data using the descriptor received from the host only when the received password matches a predetermined value.

### Claim 4 (depends on 1)

The UFS device of claim 1, wherein the calibration manager is configured to store the updated calibration data in the flash memory.

### Claim 5 (depends on 1)

The UFS device of claim 1, further comprising: a volatile memory for storing the descriptor, wherein the calibration manager is further configured to read the descriptor from the volatile memory and change a setting of the flash memory using the read descriptor.