# US 12,001,350 B2 · Dynamically configurable motherboard > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,001,350 B2 - Document ID: US12001350B2 - Status: Granted - Kind: B2 - Application number: 17/961,902 - Filed: 2022-10-07 - Published: 2024-04-11 - Granted: 2024-06-04 - Earliest claimed: 2022-10-07 - Assignees: Oracle International Corporation - Applicants: Oracle International Corporation - Inventors: Sumeet Kochar; Buddy Duane Lumpkin - Web page: https://patentgrep.com/patent/US12001350B2 ## CPC - G06F 13/126: {and has means for transferring I/O instructions and statuses between control unit and main processor} - G06F 13/4068: {Electrical coupling} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract According to certain implementations, a motherboard is provided that enables operation as either multiple independent single-processor systems or a single multiple-processor system. In response to a request to configure the motherboard as multiple independent single-processor systems, a control block is implemented for each processor attached to the motherboard, where the control blocks configure the processors to boot and operate independently of each other, and the processors utilize separate motherboard resources. In response to a request to configure the motherboard as multiple independent single-processor systems, a single control block is implemented all processors attached to the motherboard, where the single control block configures all processors to boot and operate in a connected state, and the processors share all motherboard resources. ## Claims ### Claim 1 A motherboard hardware-implemented method, comprising: responsive to a signal to configure the motherboard as multiple independent single-processor systems, configuring, by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the multiple independent single-processor systems; and responsive to a signal to configure the motherboard as a single multiple-processor system, configuring, by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the single multiple-processor system. ### Claim 2 (depends on 1) The motherboard hardware-implemented method of claim 1, comprising: receiving, by the motherboard hardware, the signal to configure the motherboard as multiple independent single-processor systems; sending a multiple independent single-processor system configuration from a management block of the motherboard to a first control block of the motherboard; implementing, by the first control block of the motherboard, a second control block of the motherboard, where the first control block manages a first processor of a first single-processor system and the second control block manages a second processor of a second single-processor system implemented within the motherboard; configuring, by the first control block and the second control block of the motherboard, the corresponding first and second processors to boot independently of each other; configuring, by the management block of the motherboard, resources of the motherboard so that both the first single-processor system and the second single-processor system have their own set of resources; initializing, by the motherboard hardware, the first single-processor system with the first processor; and initializing, by the motherboard hardware, the second single-processor system with the second processor. ### Claim 3 (depends on 1) The motherboard hardware-implemented method of claim 1, comprising: receiving, by the motherboard hardware, the signal to configure the motherboard as a single multiple-processor system; sending a single multiple-processor system configuration from a management block of the motherboard to a first control block of the motherboard; configuring, by the first control block of the motherboard, both a first processor and a second processor to boot in a connected state; configuring, by the management block of the motherboard, resources of the motherboard so that the single multiple-processor system has all available motherboard resources; and initializing, by the motherboard hardware, the single multiple-processor system. ### Claim 4 (depends on 1) The motherboard hardware-implemented method of claim 1, comprising: implementing, by the motherboard hardware, a first configuration of the motherboard; receiving, by the motherboard hardware, a signal to change the first configuration of the motherboard; placing, by the motherboard hardware, the motherboard into a standby mode; receiving, by the motherboard hardware while the motherboard is in the standby mode, a signal indicating a second configuration different from the first configuration; implementing, by the motherboard hardware while the motherboard is in the standby mode, the second configuration; and performing, by the motherboard hardware, one or more boot operations utilizing the second configuration. ### Claim 5 (depends on 1) The motherboard hardware-implemented method of claim 1, wherein the signal is received at a management block of the motherboard. ### Claim 6 (depends on 1) The motherboard hardware-implemented method of claim 1, wherein configuring by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the multiple independent single-processor systems includes implementing, by a first control block of the motherboard, a second control block of the motherboard, where the first control block and the second control block each comprise a field-programmable gate arrays (FPGAs). ### Claim 7 (depends on 1) The motherboard hardware-implemented method of claim 1, comprising sending a desired configuration from a management block of the motherboard to a control block of the motherboard, utilizing a serial peripheral interface (SPI). ### Claim 8 (depends on 1) The motherboard hardware-implemented method of claim 1, wherein configuring by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the multiple independent single-processor systems includes configuring a first processor mounted to the motherboard to boot independently of a second processor mounted to the motherboard. ### Claim 9 (depends on 1) The motherboard hardware-implemented method of claim 1, wherein configuring by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the single multiple-processor system includes configuring both a first processor mounted to the motherboard and a second processor mounted to the motherboard to boot in a connected state. ### Claim 10 (depends on 1) The motherboard hardware-implemented method of claim 1, wherein configuring by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the multiple independent single-processor systems includes adding a processor parameter to communications between a management block and a control block of the motherboard, the processor parameter indicating a processor to which an associated operation is to be performed. ### Claim 11 A motherboard comprising: hardware configured to: responsive to a signal to configure the motherboard as multiple independent single-processor systems, configure one or more components within the motherboard to enable an operation of the motherboard as the multiple independent single-processor systems; and responsive to a signal to configure the motherboard as a single multiple-processor system, configure one or more components within the motherboard to enable an operation of the motherboard as the single multiple-processor system. ### Claim 12 (depends on 11) The motherboard of claim 11, wherein the hardware is further configured to: receive the signal to configure the motherboard as multiple independent single-processor systems; send a multiple independent single-processor system configuration from a management block of the motherboard to a first control block of the motherboard; implement, by the first control block of the motherboard, a second control block of the motherboard, where the first control block manages a first processor of a first single-processor system and the second control block manages a second processor of a second single-processor system implemented within the motherboard; configure, by the first control block and the second control block of the motherboard, the corresponding first and second processors to boot independently of each other; configure, by the management block of the motherboard, resources of the motherboard so that both the first single-processor system and the second single-processor system have their own set of resources; initialize the first single-processor system with the first processor; and initialize the second single-processor system with the second processor. ### Claim 13 (depends on 11) The motherboard of claim 11, wherein the hardware is further configured to: receive the signal to configure the motherboard as a single multiple-processor system; send a single multiple-processor system configuration from a management block of the motherboard to a first control block of the motherboard; configure, by the first control block of the motherboard, both a first processor and a second processor to boot in a connected state; configure, by the management block of the motherboard, resources of the motherboard so that the single multiple-processor system has all available motherboard resources; and initialize the single multiple-processor system. ### Claim 14 (depends on 11) The motherboard of claim 11, wherein the hardware is further configured to: implement a first configuration of the motherboard; receive a signal to change the first configuration of the motherboard; place the motherboard into a standby mode; receive, while the motherboard is in the standby mode, a signal indicating a second configuration different from the first configuration; implement, while the motherboard is in the standby mode, the second configuration; and perform one or more boot operations utilizing the second configuration. ### Claim 15 (depends on 11) The motherboard of claim 11, wherein the signal is received at a management block of the motherboard. ### Claim 16 (depends on 11) The motherboard of claim 11, wherein configuring, by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the multiple independent single-processor systems includes implementing, by a first control block of the motherboard, a second control block of the motherboard, where the first control block and the second control block each comprise a field-programmable gate arrays (FPGAs). ### Claim 17 (depends on 11) The motherboard of claim 11, wherein the hardware is further configured to send a desired configuration from a management block of the motherboard to a control block of the motherboard, utilizing a serial peripheral interface (SPI). ### Claim 18 (depends on 11) The motherboard of claim 11, wherein configuring, by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the multiple independent single-processor systems includes configuring a first processor mounted to the motherboard to boot independently of a second processor mounted to the motherboard. ### Claim 19 (depends on 11) The motherboard of claim 11, wherein configuring, by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the single multiple-processor system includes configuring both a first processor mounted to the motherboard and a second processor mounted to the motherboard to boot in a connected state. ### Claim 20 Motherboard hardware storing a set of instructions, the set of instructions when executed by the motherboard hardware causing processing to be performed comprising: responsive to a signal to configure the motherboard as multiple independent single-processor systems, configuring, by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the multiple independent single-processor systems; and responsive to a signal to configure the motherboard as a single multiple-processor system, configuring, by the motherboard hardware, one or more components within the motherboard to enable an operation of the motherboard as the single multiple-processor system.