# US 12,001,334 B2 · Uniform cache system for fast data access

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- Number: US 12,001,334 B2
- Document ID: US12001334B2
- Status: Granted
- Kind: B2
- Application number: 17/125,971
- Filed: 2020-12-17
- Published: 2022-06-16
- Granted: 2024-06-04
- Earliest claimed: 2020-12-11
- Assignees: Advanced Micro Devices, Inc.
- Applicants: Advanced Micro Devices, Inc.
- Inventors: Dazheng Wang; Xuwei Chen
- Web page: https://patentgrep.com/patent/US12001334B2

## CPC

- G06F 12/0811: with multilevel cache hierarchies
- G06F 12/0833: {in combination with broadcast means (e.g. for invalidation or updating)}
- G06F 12/0891: using clearing, invalidating or resetting means
- G06F 2212/1021: Hit rate improvement
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A uniform cache for fast data access including a plurality of compute units (CUs) and a plurality of L0 caches with an arrangement in a network configuration where each one of CUs is surrounded by a first group of the plurality of L0 caches and each of the plurality of L0 caches is surrounded by a L0 cache group and CU group. One of CUs, upon a request for data, queries the surrounding first group of L0 caches to satisfy the request. If the first group of L0 caches fails to satisfy the data request, the first group of the plurality of L0 caches queries a second group of adjacent LO caches to satisfy the request. If the second group of adjacent L0 caches fails to satisfy the data request, the second group of adjacent L0 caches propagating the query to the next group of L0 caches.

## Claims

### Claim 1

A uniform cache system for fast data access, the system comprising:
a plurality of compute units (CUs); and
a plurality of L0 caches;
the plurality of CUs and the plurality of L0 caches being arranged in a network configuration with each of a first group of L0 caches being adjacent to one of the plurality of CUs, and where the first group of the plurality of L0 caches surrounds the one of the plurality of CUs; and
upon a request for data, the one of the plurality of CUs queries each of the first group of the plurality of L0 caches to satisfy the request.

### Claim 2 (depends on 1)

The system of claim 1 wherein the first group comprises six L0 caches.

### Claim 3 (depends on 1)

The system of claim 1 wherein the L0 cache group includes three L0 caches.

### Claim 4 (depends on 1)

The system of claim 1 wherein the plurality of CUs forms a CU group that with a group of L0 caches surrounds each of the plurality of L0 caches, and the CU group includes three CUs.

### Claim 5 (depends on 1)

The system of claim 1, further comprising on a condition that the first group of the plurality of L0 caches fails to satisfy the data request, having at least one of the first group of the plurality of L0 caches query a second group of adjacent L0 caches to satisfy the request.

### Claim 6 (depends on 5)

The system of claim 5, further comprising on a condition that the second group of adjacent L0 caches fails to satisfy the data request, having at least one of the second group of adjacent L0 caches propagating the query to the next group of L0 caches.

### Claim 7 (depends on 6)

The system of claim 6, further comprising iterating subsequent propagations of the query to subsequent next groups of L0 caches.

### Claim 8

A method performed in a uniform cache system for fast data access, the method comprising:
receiving a data request at at least one compute unit (CU); and
sending data request from the at least one CU to a first group of L0 caches to satisfy the request, each L0 cache in the first group of L0 caches being adjacent to the at least one CU, the first group of L0 caches being configured to surround the at least one CU.

### Claim 9 (depends on 8)

The method of claim 8 wherein the first group comprises six L0 caches.

### Claim 10 (depends on 8)

The method of claim 8, further comprising on a condition that the first group of L0 caches fails to satisfy the data request, propagating the data request from the first group of L0 caches to a next tier of L0 caches to satisfy the request.

### Claim 11 (depends on 10)

The method of claim 10, further comprising on a condition that the next tier of L0 caches fails to satisfy the data request, propagating the data request to the next tier of L0 caches.

### Claim 12 (depends on 11)

The method of claim 11, further comprising iterating subsequent propagations of the data request to subsequent next groups of L0 caches.

### Claim 13 (depends on 8)

The method of claim 8, further comprising on a condition of a hit, returning the data requested.

### Claim 14 (depends on 8)

The method of claim 8, further comprising on a condition of a miss, providing the data request to an L2 cache.

### Claim 15

A non-transient computer readable medium including hardware design code stored thereon which when executed by a processor cause the system to perform a method for fast data access in a uniform cache system, the method comprising:
receiving a data request at at least one compute unit (CU); and
sending data request from the at least one CU to a first group of L0 caches to satisfy the request, each L0 cache in the first group of L0 caches being adjacent to the at least one CU, the first group of L0 caches being configured to surround the at least one CU.

### Claim 16 (depends on 15)

The computer readable medium of claim 15, further comprising on a condition that the first group of L0 caches fails to satisfy the data request, propagating the data request from the first group of L0 caches to a next tier of L0 caches to satisfy the request.

### Claim 17 (depends on 16)

The computer readable medium of claim 16, further comprising on a condition that the next tier of L0 caches fails to satisfy the data request, propagating the data request to the next tier of L0 caches.

### Claim 18 (depends on 17)

The computer readable medium of claim 17, further comprising iterating subsequent propagations of the data request to subsequent next groups of L0 caches.

### Claim 19 (depends on 15)

The computer readable medium of claim 15, further comprising on a condition of a hit, returning the data requested.

### Claim 20 (depends on 15)

The computer readable medium of claim 15, further comprising on a condition of a miss, providing the data request to an L2 cache.