# US 12,001,257 B2 · Power management system with capacitor

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- Number: US 12,001,257 B2
- Document ID: US12001257B2
- Status: Granted
- Kind: B2
- Application number: 17/456,904
- Filed: 2021-11-30
- Published: 2023-04-06
- Granted: 2024-06-04
- Earliest claimed: 2021-10-01
- Assignees: NXP USA, Inc.
- Applicants: NXP USA, Inc.
- Inventors: Vincent Aubineau; Michael Andreas Staudenmaier; Pierre Juste
- Web page: https://patentgrep.com/patent/US12001257B2

## CPC

- G06F 1/3203: Power management, i.e. event-based initiation of a power-saving mode
- G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C)
- H02M 3/07: using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps}
- H02M 1/36: Means for starting or stopping converters
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)

## Abstract

A power management system includes a capacitor, control logic configured to determine a wait time in response to a comparison of a voltage of the capacitor to a threshold voltage and to initiate a startup upon expiration of the wait time, and a control circuit configured to charge the capacitor, discharge the capacitor, and provide the voltage of the capacitor to the control logic.

## Claims

### Claim 1

A power management system comprising:
a capacitor;
control logic configured to determine a wait time in response to a comparison of a voltage of the capacitor to a threshold voltage and to initiate a startup upon expiration of the wait time; and
a control circuit configured to charge the capacitor, discharge the capacitor, and provide the voltage of the capacitor to the control logic, wherein the control circuit includes a discharge circuit, a charge circuit, and a trigger circuit.

### Claim 2 (depends on 1)

The power management system of claim 1, wherein the capacitor is charged once voltage rails of a Power Management Integrated Circuit (PMIC) are supplied.

### Claim 3 (depends on 1)

The power management system of claim 1, wherein the control logic, the control circuit, and the capacitor are connected within a PMIC.

### Claim 4 (depends on 1)

The power management system of claim 1, wherein the control logic and the control circuit are connected within a PMIC, and the capacitor is external to the PMIC.

### Claim 5 (depends on 4)

The power management system of claim 4, wherein the PMIC includes a pin for connection to the capacitor.

### Claim 6 (depends on 1)

The power management system of claim 1, wherein the discharge circuit includes a switch configured to control discharge of the capacitor.

### Claim 7 (depends on 6)

The power management system of claim 6, wherein the charge circuit includes a switch configured to control charging of the capacitor.

### Claim 8 (depends on 6)

The power management system of claim 6, wherein the trigger circuit includes a switch configured to provide the voltage of the capacitor to the control logic.

### Claim 9 (depends on 6)

The power management system of claim 6, wherein:
the discharge circuit includes a switch configured to control discharge of the capacitor;
the charge circuit includes a switch configured to control charging of the capacitor; and
the trigger circuit includes a switch configured to provide the voltage of the capacitor to the control logic.

### Claim 10

A method for power management, the method comprising:
charging, once voltage rails of a Power Management Integrated Circuit (PMIC) are supplied, a capacitor with a voltage;
performing, by the PMIC, a startup sequence after a power loss, wherein the startup sequence involves:
comparing the voltage of the capacitor to a threshold voltage;
determining a wait time of a startup of a system connected to the PMIC in response to the comparison, wherein the startup is a power-on reset of the system; and
initiating the startup upon expiration of the wait time.

### Claim 11 (depends on 10)

The method of claim 10, wherein the PMIC includes control logic and a control circuit connected to the capacitor, and wherein the control circuit includes a discharge circuit, a charge circuit, and a trigger circuit.

### Claim 12 (depends on 11)

The method of claim 11, wherein a switch in the discharge circuit is opened to discharge the capacitor.

### Claim 13 (depends on 11)

The method of claim 11, wherein a switch in the charge circuit is opened to charge the capacitor.

### Claim 14 (depends on 11)

The method of claim 11, wherein a switch in the trigger circuit is opened to provide the voltage of the capacitor to the control logic.

### Claim 15 (depends on 11)

The method of claim 11, wherein the control logic, the control circuit, and the capacitor are connected within the PMIC.

### Claim 16 (depends on 11)

The method of claim 11, wherein the control logic and the control circuit are connected within the PMIC, and the capacitor is external to the PMIC.

### Claim 17 (depends on 10)

The method of claim 10, wherein the wait time is based on the voltage.

### Claim 18

A Power Management Integrated Circuit (PMIC) comprising:
control logic configured to determine after a power loss a wait time in response to a comparison of a voltage of a capacitor to a threshold voltage and to initiate a startup of a system connected to the PMIC upon expiration of the wait time, wherein the startup is a power-on reset of the system; and
a control circuit configured to provide the voltage of the capacitor to the control logic.

### Claim 19 (depends on 18)

The PMIC of claim 18, further including the capacitor.

### Claim 20 (depends on 18)

The PMIC of claim 18, wherein the PMIC includes a pin for connection to the capacitor.

### Claim 21 (depends on 18)

The PMIC of claim 18, wherein the wait time is based on the voltage.