Recording a trace of code execution using reference bits in a processor cache
AssigneeMicrosoft Technology Licensing, LLC
InventorJordi Mola
Life of this patent
Estimating the term…
Abstract
Recording a trace of code execution using reference bits in a processor cache. A computing device comprises processing units and a shared cache. The shared cache includes a plurality of cache lines that is each associated with a plurality of accounting bits, which each includes a reference bits portion. Stored control logic uses these reference bits to log a second read operation by a second processing unit in reference to an already logged first read operation by a first processing unit.
Claims20
A computing device comprising:
- a plurality of processing units;
- a processor cache that is shared by the plurality of processing units, and which includes a plurality of cache lines, each cache line of the plurality of cache lines being associated with a corresponding plurality of accounting bits that includes a corresponding reference bits portion;
- and
- stored control logic that is configured to:
- based on identifying a first operation corresponding to a particular cache line of the plurality of cache lines:
- determine that the first operation is a first read that is consumed by a first processing unit of the plurality of processing units,
- determine that a value of the particular cache line has not been logged on behalf of any processing unit,
- log the value of the particular cache line into a first trace corresponding to the first processing unit, and
- update the corresponding reference bits portion of the corresponding plurality of accounting bits associated with the particular cache line with a reference value, the reference value referencing the value of the particular cache line that is logged into the first trace;
- and
- based on identifying a second operation corresponding to the particular cache line of the plurality of cache lines:
- determine that the second operation is a second read that is consumed by a second processing unit of the plurality of processing units,
- determine that the value of the particular cache line has already been logged on behalf of the first processing unit, and
- based on the corresponding reference bits portion, log the reference value into a second trace corresponding to the second processing unit.
A method implemented at a computing device that includes a plurality of processing units and a processor cache that is shared by the plurality of processing units, the processor cache including a plurality of cache lines, each cache line of the plurality of cache lines being associated with a corresponding plurality of accounting bits that includes a corresponding reference bits portion, the method comprising:
- based on identifying a first operation corresponding to a particular cache line of the plurality of cache lines:
- determining that the first operation is a first read that is consumed by a first processing unit of the plurality of processing units,
- determining that a value of the particular cache line has not been logged on behalf of any processing unit,
- logging the value of the particular cache line into a first trace corresponding to the first processing unit, and
- updating the corresponding reference bits portion of the corresponding plurality of accounting bits associated with the particular cache line with a reference value, the reference value referencing the value of the particular cache line that is logged into the first trace;
- and
- based on identifying a second operation corresponding to the particular cache line of the plurality of cache lines:
- determining that the second operation is a second read that is consumed by a second processing unit of the plurality of processing units,
- determining that the value of the particular cache line has already been logged on behalf of the first processing unit, and
- based on the corresponding reference bits portion, logging the reference value into a second trace corresponding to the second processing unit.
A computer program product comprising one or more hardware storage devices storing one or more executable instructions that are executable within a computing environment that includes a plurality of processing units and a processor cache that is shared by the plurality of processing units, the processor cache including a plurality of cache lines, each cache line of the plurality of cache lines being associated with a corresponding plurality of accounting bits that includes a corresponding reference bits portion, the one or more executable instructions including instructions that that are executable to at least:
- based on identifying a first operation corresponding to a particular cache line of the plurality of cache lines:
- determine that the first operation is a first read that is consumed by a first processing unit of the plurality of processing units,
- determine that a value of the particular cache line has not been logged on behalf of any processing unit,
- log the value of the particular cache line into a first trace corresponding to the first processing unit, and
- update the corresponding reference bits portion of the corresponding plurality of accounting bits associated with the particular cache line with a reference value, the reference value referencing the value of the particular cache line that is logged into the first trace;
- and
- based on identifying a second operation corresponding to the particular cache line of the plurality of cache lines:
- determine that the second operation is a second read that is consumed by a second processing unit of the plurality of processing units,
- determine that the value of the particular cache line has already been logged on behalf of the first processing unit, and
- based on the corresponding reference bits portion, log the reference value into a second trace corresponding to the second processing unit.
Dependencies are inferred from the claim text.