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US 11,994,901 B2Granted
Clock data recovery circuit
AssigneeTexas Instruments Incorporated
InventorsMichael Ryan Hanschke, Pankaj Pandey, Joseph Pham, David Wayne Evans
Life of this patent
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Abstract
A clock data recovery circuit includes a deglitch filter circuit and a timer circuit. The deglitch filter circuit is configured to remove pulses of less than a particular duration from a data signal to produce a deglitched data signal. The timer circuit is coupled to the deglitch filter, and is configured to compare a duration of a pulse of the deglitched data signal to a threshold duration, and identify the pulse as representing a logic one based on the duration of the pulse exceeding the threshold duration.
Claims7
A clock data recovery circuit, comprising:
- a deglitch filter circuit configured to output a deglitched data signal including a pulse;
- and
- a timer circuit coupled to the deglitch filter circuit, the timer circuit including:
- an oscillator circuit configured to generate a clock signal for a duration of the pulse received from the deglitch filter circuit;
- a first latch circuit configured to detect a falling edge of the clock signal;
- and
- a second latch circuit configured to:
- responsive to the first latch circuit detecting the falling edge of the clock signal, detect a rising edge of the clock signal;
- and
- responsive to detecting the rising edge of the clock signal, storing a logic one at an end of a threshold duration.
7 more elements
Dependencies are inferred from the claim text.