# US 11,994,557 B2 · Adaptive port ceiling assignment for background I/O operations between heterogeneous storage arrays > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,994,557 B2 - Document ID: US11994557B2 - Status: Granted - Kind: B2 - Application number: 17/943,244 - Filed: 2022-09-13 - Published: 2024-03-14 - Granted: 2024-05-28 - Earliest claimed: 2022-09-13 - Assignees: Dell Products L.P. - Applicants: Dell Products, L.P. - Inventors: Ananthakrishnan Anirudhan; Santoshkumar Konnur; Deepak Vokaliga - Web page: https://patentgrep.com/patent/US11994557B2 ## CPC - G01R 31/31715: {Testing of input or output circuits; test of circuitry between the I/C pins and the functional core, e.g. testing of input or output driver, receiver, buffer} - G06F 3/067: {Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]} - G01R 31/31725: {Timing aspects, e.g. clock distribution, skew, propagation delay (for tester hardware G01R31/31937)} - G01R 31/31813: {Test pattern generators} - G06F 3/061: {Improving I/O performance} - G06F 3/0631: {by allocating resources to storage systems} - G06F 3/0653: {Monitoring storage devices or systems} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A port manager is configured to implement adaptive port ceiling assignment for background Input/Output (I/O) operations between heterogeneous storage arrays. The port manager generates a set of test I/O operations, applies the I/O operations to a port under test, determines a response time to complete the I/O operations on the port under test, and compares the response time of the current test with response times of a set of previous tests. Based on the test values, the port manager identifies a throughput inflection point for the port under test, which is used to set a maximum throughput of the port under test. The adaptive ceiling for the port under test is then set based on the maximum throughput times a ceiling percentage threshold value. The determined adaptive ceiling value is then used to prospectively limit background I/O operations on the port under test. ## Claims ### Claim 1 A method of implementing adaptive port ceiling assignment for limiting background Input/Output (I/O) operations between heterogeneous storage arrays on a port used to implement both host IO operations and the background IO operations between the heterogeneous storage arrays, comprising: generating a set of M test I/O operations; applying the M test I/O operations to the port; determining a response time to complete the M test I/O operations on the port; comparing the response time to complete the M test I/O operations on the port with a previous set of response times associated with completion of different numbers of test I/O operations on the port; using the result of the comparison of the response time to complete the M test I/O operations on the port with a previous set of response times associated with completion of the different number of test I/O operations on the port to determine a throughput inflection point for the port; setting a maximum throughput of the port based on the determined throughput inflection point; multiplying the maximum throughput of the port with a ceiling percentage threshold value associated with the port to assign an adaptive port ceiling for the port; and prospectively using the assigned adaptive port ceiling to limit the background IO operations implemented on the port between the heterogeneous storage arrays. ### Claim 2 (depends on 1) The method of claim 1, wherein comparing the response time to complete the M test I/O operations on the port with the previous set of response times associated with completion of the different numbers of test I/O operations on the port comprises: adding the response time to complete the M test I/O operations on the port to a data structure, the data structure also including the previous set of response times associated with completion of the different numbers of test I/O operations on the port; determining an average value of the response times contained in the data structure; and comparing the response time to complete the M test I/O operations on the port with the average value of the response times. ### Claim 3 (depends on 2) The method of claim 2, further comprising determining the throughput inflection point for the port when the response time to complete the M test I/O operations on the port is higher than the average value of the response times. ### Claim 4 (depends on 1) The method of claim 1, wherein each of the M test I/O operations has a fixed size. ### Claim 5 (depends on 1) The method of claim 1, wherein at least some of the M test I/O operations have different sizes. ### Claim 6 (depends on 4) The method of claim 4, wherein setting a maximum throughput of the port is based on the number of test I/O operations times the size of the I/O operations. ### Claim 7 (depends on 1) The method of claim 1, wherein the M test I/O operations are read I/O operations directed at one of the heterogeneous storage arrays requesting that data be transmitted from the one of the heterogenous storage arrays back via the port. ### Claim 8 (depends on 1) The method of claim 1, wherein prospectively using the assigned adaptive port ceiling to limit background I/O operations on the port comprises determining a delay value to be applied between successive subsequent background I/O operations on the port. ### Claim 9 (depends on 8) The method of claim 8, wherein the delay value is based on the size of the background I/O operations. ### Claim 10 A non-transitory tangible computer readable storage medium having stored thereon a computer program for implementing adaptive port ceiling assignment for limiting background Input/Output (I/O) operations between heterogeneous storage arrays on a port used to implement both host IO operations and the background IO operations between the heterogeneous storage arrays, the computer program including a set of instructions which, when executed by a computer, cause the computer to perform a method comprising the steps of: generating a set of M test I/O operations; applying the M test I/O operations to the port a port; determining a response time to complete the M test I/O operations on the port; comparing the response time to complete the M test I/O operations on the port with a previous set of response times associated with completion of different numbers of test I/O operations on the port; using the result of the comparison of the response time to complete the M test I/O operations on the port with a previous set of response times associated with completion of the different number of test I/O operations on the port to determine a throughput inflection point for the port; setting a maximum throughput of the port based on the determined throughput inflection point; multiplying the maximum throughput of the port with a ceiling percentage threshold value associated with the port to assign an adaptive port ceiling for the port; and prospectively using the assigned adaptive port ceiling to limit the background IO operations implemented on the port between the heterogeneous storage arrays. ### Claim 11 (depends on 10) The non-transitory tangible computer readable storage medium of claim 10, wherein comparing the response time to complete the M test I/O operations on the port with the previous set of response times associated with completion of the different numbers of test I/O operations on the port comprises: adding the response time to complete the M test I/O operations on the port to a data structure, the data structure also including the previous set of response times associated with completion of the different numbers of test I/O operations on the port; determining an average value of the response times contained in the data structure; and comparing the response time to complete the M test I/O operations on the port with the average value of the response times. ### Claim 12 (depends on 10) The non-transitory tangible computer readable storage medium of claim 10, further comprising determining the throughput inflection point for the port when the response time to complete the M test I/O operations on the port is higher than the average value of the response times. ### Claim 13 (depends on 10) The non-transitory tangible computer readable storage medium of claim 10, wherein each of the M test I/O operations has a fixed size. ### Claim 14 (depends on 10) The non-transitory tangible computer readable storage medium of claim 10, wherein at least some of the M test I/O operations have different sizes. ### Claim 15 (depends on 10) The non-transitory tangible computer readable storage medium of claim 10, wherein setting a maximum throughput of the port is based on the number of test I/O operations times the size of the I/O operations. ### Claim 16 (depends on 10) The non-transitory tangible computer readable storage medium of claim 10, wherein the M test I/O operations are read I/O operations directed at one of the heterogeneous storage arrays requesting that data be transmitted from the one of the heterogenous storage arrays back via the port. ### Claim 17 (depends on 10) The non-transitory tangible computer readable storage medium of claim 10, wherein prospectively using the assigned adaptive port ceiling to limit background I/O operations on the port Currently Amended comprises determining a delay value to be applied between successive subsequent background I/O operations on the port. ### Claim 18 (depends on 17) The non-transitory tangible computer readable storage medium of claim 17, wherein the delay value is based on the size of the background I/O operations.