# US 11,994,416 B2 · Signal processing circuit of anti-pollution optical encoder

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- Number: US 11,994,416 B2
- Document ID: US11994416B2
- Status: Granted
- Kind: B2
- Application number: 18/219,729
- Filed: 2023-07-10
- Published: 2023-11-02
- Granted: 2024-05-28
- Earliest claimed: 2020-11-25
- Assignees: Pixart Imaging Inc.
- Applicants: PixArt Imaging Inc.
- Inventors: Kuan-Choong Shim; Gim-Eng Chew; Priscilla Tze-Wei Goh; Meng-Yee Lim
- Web page: https://patentgrep.com/patent/US11994416B2

## CPC

- G01D 5/3473: {Circular or rotary encoders}
- G01D 5/34792: {with only digital scales or both digital and incremental scales}
- G01D: MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR

## Abstract

There is provided an optical encoder including an encoding medium, multiple photodiodes and a signal processing circuit. The encoding medium includes an index track. The index track includes a first index pattern and a second index pattern. The multiple photodiodes include a first index photodiode, a second index photodiode and a reference index photodiode for receiving modulated light from the first index pattern and the second index pattern. When the first index photodiode is aligned with the first index pattern and the second index photodiode is aligned with the second index pattern, the signal processing circuit outputs a triggering signal.

## Claims

### Claim 1

A signal processing circuit of an optical encoder, the optical encoder comprising a first index photodiode, a second index photodiode and a reference index photodiode, the signal processing circuit comprising:
a trans-impedance amplifier (TIA), electrically coupled to the first index photodiode, the second index photodiode and the reference index photodiode, and configured to convert a first photocurrent generated by the first index photodiode, a second photocurrent generated by the second index photodiode and a reference photocurrent generated by the reference index photodiode respectively to a first voltage, a second voltage and a reference voltage;
a first comparator, configured to compare the first voltage and the reference voltage to output a first comparison voltage;
a second comparator, configured to compare the second voltage and the reference voltage to output a second comparison voltage; and
an AND gate, configured to receive the first comparison voltage and the second comparison voltage to accordingly generate an index output.

### Claim 2 (depends on 1)

The signal processing circuit as claimed in claim 1, wherein the TIA comprises:
a first TIA, comprising a first input end and a second input end, wherein the first input end is configured to receive the first photocurrent to generate the first voltage, and the second input end is configured to receive the reference photocurrent to generate the reference voltage; and
a second TIA, comprising a third input end and a fourth input end, wherein the third input end is configured to receive the second photocurrent to generate the second voltage, and the fourth input end is configured to receive the reference photocurrent to generate the reference voltage.

### Claim 3 (depends on 1)

The signal processing circuit as claimed in claim 1, wherein when the first photocurrent and the second photocurrent are larger than the reference photocurrent, the index output has a potential change to indicate a predetermined position of an encoding medium of the optical encoder.

### Claim 4 (depends on 3)

The signal processing circuit as claimed in claim 3, wherein the potential change forms a voltage pulse.

### Claim 5 (depends on 1)

The signal processing circuit as claimed in claim 1, wherein the optical encoder further comprises a third index photodiode,
the TIA is further electrically coupled to the third index photodiode and configured to convert a third photocurrent generated by the third index photodiode to a third voltage,
the signal processing circuit further comprises a third comparator configured to compare the third voltage and the reference voltage to output a third comparison voltage, and
the AND gate is configured to receive the first comparison voltage, the second comparison voltage and the third comparison voltage to accordingly generate the index output.

### Claim 6 (depends on 5)

The signal processing circuit as claimed in claim 5, wherein the TIA comprises:
a first TIA, comprising a first input end and a second input end, wherein the first input end is configured to receive the first photocurrent to generate the first voltage, and the second input end is configured to receive the reference photocurrent to generate the reference voltage;
a second TIA, comprising a third input end and a fourth input end, wherein the third input end is configured to receive the second photocurrent to generate the second voltage, and the fourth input end is configured to receive the reference photocurrent to generate the reference voltage; and
a third TIA, comprising a fifth input end and a sixth input end, wherein the fifth input end is configured to receive the third photocurrent to generate the third voltage, and the sixth input end is configured to receive the reference photocurrent to generate the reference voltage.

### Claim 7 (depends on 5)

The signal processing circuit as claimed in claim 5, wherein when the first photocurrent, the second photocurrent and the third photocurrent are larger than the reference photocurrent, the index output has a potential change to indicate a predetermined position of an encoding medium of the optical encoder.

### Claim 8 (depends on 7)

The signal processing circuit as claimed in claim 7, wherein the potential change forms a voltage pulse.

### Claim 9 (depends on 1)

The signal processing circuit as claimed in claim 1, wherein
the optical encoder comprises an encoding medium having an index track thereon configured to indicate a predetermined position of the encoding medium, and the index track comprises a first index pattern and a second index pattern arranged in a transverse direction, and
when the first index pattern is aligned with the first index photodiode and the second index pattern is aligned with the second index photodiode, the reference index photodiode is not aligned with the first index pattern or the second index pattern.

### Claim 10 (depends on 9)

The signal processing circuit as claimed in claim 9, wherein the reference index photodiode is between the first index photodiode and the second index photodiode in the transverse direction.
