DAC weight calibration

Abstract

A method of weight calibration in a DAC (25) is disclosed. The DAC (25) comprises an input port (100) for receiving a sequence of digital input words (x[n]), each representing a digital input sample, and a digital control circuit (110) configured to encode each digital input word (x[n]) into a control word (z[n]) representing the same digital input sample. Each bit (Zi) in the control word (z[n]) has a corresponding bit weight (wi) and is in the following considered to adopt values in {−1, 1}. Furthermore, the DAC (25) comprises a set (120) of analog weights, each associated with a unique one of the bits (Zi) in the control word (z[n]), and summation circuitry (130) configured to generate an analog sample corresponding to the digital input sample by summing the bits in the control word (Zi) weighted by the respective associated analog weights. The DAC (25) also has an output (140) for outputting the analog sample. The method comprises, during a measurement procedure, for a first set of at least one bit of the control word (z[n]), generating (300) the bits of the first set, such that a first sum of the bits in the first set weighted by their respective bit weights is, on average, above zero. Furthermore, the method comprises, during the measurement procedure, for a second set of at least one bit of the control word (z[n]), generating (310) the bits of the second set, such that a second sum of the bits in the second set weighted by their respective bit weights is, on average, below zero and such that the sum of the first sum and the second sum is, on average, equal to zero. The method also comprises detecting (330) a DC level at the output of the DAC during the measurement procedure. The method further comprises adjusting (340) at least one analog weight in response to the detected DC level. A corresponding DAC, a corresponding electronic apparatus, and a corresponding integrated circuit are also disclosed.

Dependencies are inferred from the claim text.