Erase cycle healing using a high voltage pulse
AssigneeMicron Technology, Inc.
InventorsVamsi Pavan Rayaprolu, Kishore Kumar Muchherla, Harish R. Singidi, Ashutosh Malshe
Life of this patent
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Abstract
An indication to perform a write operation at a memory component can be received. A voltage pulse can be applied to a destination block of the memory component to store data of the write operation, the voltage pulse being at a first voltage level associated with a programmed state. An erase operation for the destination block can be performed to change the voltage state of the memory cell from the programmed state to a second voltage state associated with an erased state. A write operation can be performed to write the data to the destination block upon changing the voltage state of the memory cell to the second voltage state.
Claims20
A method comprising:
- receiving an indication to perform a write operation for the memory component;
- applying a voltage pulse to a destination block of the memory component to store data of the write operation, the voltage pulse being at a first voltage level associated with a programmed state;
- performing an erase operation for the destination block to change the voltage state of the memory cell from the programmed state to a second voltage level associated with an erased state;
- determining whether a number of voltage pulses applied to the destination block satisfies an operation repeat condition;
- responsive to determining that the number of voltage pulses applied to the destination block satisfies an operation repeat condition:
- applying an additional voltage pulse to the destination block, the additional voltage pulse being at the first voltage level associated with the programmed state, and
- performing an additional erase operation for the destination block upon applying the additional voltage pulse;
- and
- performing the write operation for the memory component.
A system comprising:
- a memory component;
- and
- a processing device, operatively coupled with the memory component, to perform operations comprising:
- receiving an indication to perform a write operation for the memory component;
- applying a voltage pulse to a destination block of the memory component to store data of the write operation, the voltage pulse being at a first voltage level associated with a programmed state;
- performing an erase operation for the destination block to change the voltage state of the memory cell from the programmed state to a second voltage level associated with an erased state;
- determining whether a number of voltage pulses applied to the destination block satisfies an operation repeat condition;
- responsive to determining that the number of voltage pulses applied to the destination block satisfies an operation repeat condition:
- applying an additional voltage pulse to the destination block, the additional voltage pulse being at the first voltage level associated with the programmed state, and
- performing an additional erase operation for the destination block upon applying the additional voltage pulse;
- and
- performing the write operation for the memory component.
A non-transitory computer readable medium comprising instructions, which when executed by a processing device, cause the processing device to perform operations comprising:
- receiving an indication to perform a write operation for the memory component;
- applying a voltage pulse to a destination block of the memory component to store data of the write operation, the voltage pulse being at a first voltage level associated with a programmed state;
- performing an erase operation for the destination block to change the voltage state of the memory cell from the programmed state to a second voltage level associated with an erased state;
- determining whether a number of voltage pulses applied to the destination block satisfies an operation repeat condition;
- responsive to determining that the number of voltage pulses applied to the destination block satisfies an operation repeat condition:
- applying an additional voltage pulse to the destination block, the additional voltage pulse being at the first voltage level associated with the programmed state, and
- performing an additional erase operation for the destination block upon applying the additional voltage pulse;
- and
- performing the write operation for the memory component.
Dependencies are inferred from the claim text.