3D memory semiconductor devices and structures with memory-line pillars
AssigneeMonolithic 3D Inc.
InventorsZvi Or-Bach, Jin-Woo Han, Eli Lusky
Life of this patent
Estimating the term…
Loading patent…
AssigneeMonolithic 3D Inc.
InventorsZvi Or-Bach, Jin-Woo Han, Eli Lusky
Estimating the term…
A 3D memory device, the device including: a first structure including a plurality of memory cells, where each memory cell of the plurality of memory cells includes at least one memory transistor, where each of the at least one memory transistor includes a source, a drain, and a channel; a plurality of memory-line pillars, where each memory-line pillar of the plurality of memory-line pillars is directly connected to a plurality of the source or the drain, where the plurality of memory-line pillars are vertically oriented, and where the at least one memory transistor is self-aligned to an overlaying another the at least one memory transistor, both being processed following a same lithography step; and a control level including a memory controller circuit, where the memory controller circuit includes a row buffer, where the control level is bonded to the first structure, and where the bonded includes hybrid bonding.
A 3D memory device, the device comprising:
A 3D memory device, the device comprising:
A 3D memory device, the device comprising:
Dependencies are inferred from the claim text.