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US 11,963,363 B2Granted
Memory device and method for fabricating the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHan-Jong Chia, Meng-Han Lin, Yu-Ming Lin
Life of this patent
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Abstract
A memory device including a word line, memory cells, source lines and bit lines is provided. The memory cells are embedded in and penetrate through the word line. The source lines and the bit lines are electrically connected the memory cells. A method for fabricating a memory device is also provided.
Claims15
A memory device, comprising:
- a word line;
- memory cells embedded in and penetrating through the word line;
- source lines electrically connected the memory cells;
- and
- bit lines electrically connected the memory cells, wherein each of the memory cells comprises:
- a source pillar embedded in and penetrating through the word line;
- a drain pillar embedded in and penetrating through the word line;
- an isolation structure embedded in and penetrating through the word line, wherein the source pillar and the drain pillar are spaced apart by the isolation structure, the source pillar is electrically connected to one of the source lines, and the drain pillar is electrically connected to one of the bit lines;
- and
- a channel layer and a charge storage dielectric layer, wherein the channel layer and the charge storage dielectric layer laterally surround the source pillar, the drain pillar and the isolation structure, and the channel layer is spaced apart from the word line by the charge storage dielectric layer,
- wherein the perimeter of each of the source pillar and the drain pillar is enclosed by the isolation structure and the channel layer, and
- wherein the isolation structure comprises a single material.
9 more elements
A memory device, comprising:
- strip-shaped stacking structures each comprising conductive lines and dielectric patterns stacked alternately;
- pillar-shaped structures penetrating through the conductive lines and the dielectric patterns of the strip-shaped stacking structures, and each of the pillar-shaped structures comprising:
- a first conductive pillar;
- a second conductive pillar;
- an isolation structure disposed between the first conductive pillar and the second conductive pillar, wherein the isolation structure comprises a single material between the first conductive pillar and the second conductive pillar;
- an oxide semiconductor layer and a charge storage dielectric layer, wherein the oxide semiconductor layer and the charge storage dielectric layer laterally surround the first conductive pillar, the second conductive pillar and the isolation structure, the charge storage dielectric layer is disposed between the oxide semiconductor layer and one of the strip-shaped stacking structures, and
- wherein the perimeter of each of the first conductive pillar and the second conductive pillar is enclosed by the isolation structure and the oxide semiconductor layer;
- and
- signal lines electrically connected to the first conductive pillar and the second conductive pillar.
6 more elements
Dependencies are inferred from the claim text.