Semiconductor memory device and manufacturing method of semiconductor memory device
AssigneeSK hynix Inc.
InventorNam Jae Lee
Life of this patent
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Abstract
The present disclosure relates to a semiconductor memory device and a manufacturing method of the semiconductor memory device. A semiconductor memory device includes a gate stacked structure, a channel layer passing through the gate stacked structure in a vertical direction, a memory layer disposed between the channel layer and the gate stacked structure, a dummy stacked structure extended toward the gate stacked structure, a first dummy pattern passing through the dummy stacked structure in the vertical direction, and a gap arranged in the first dummy pattern.
Claims14
A semiconductor memory device, comprising:
- a circuit structure including a semiconductor substrate;
- a gate stacked structure over the circuit structure;
- a channel layer passing through the gate stacked structure in a vertical direction;
- a memory layer disposed between the channel layer and the gate stacked structure;
- a dummy stacked structure over the semiconductor substrate and adjacent to the gate stacked structure;
- a first dummy pattern passing through the dummy stacked structure in the vertical direction;
- a gap arranged in the first dummy pattern;
- and
- a second dummy pattern arranged farther away from the gate stacked structure than the first dummy pattern and extending in the vertical direction,
- wherein the second dummy pattern extends along an outer sidewall of the dummy stacked structure and is closer to an edge of the semiconductor substrate than the dummy stacked structure.
A method of manufacturing a semiconductor memory device, the method comprising:
- stacking first material layers and second material layers alternately on a support substrate including a chip region and a scribe region;
- forming a dummy groove passing through the first material layers and the second material layers to expose the support substrate in the scribe region;
- forming a dummy pattern in the dummy groove to define a gap in a central area of the dummy groove;
- forming a circuit structure including a semiconductor substrate;
- overlapping the support substrate with the semiconductor substrate so that the dummy pattern is disposed between the semiconductor substrate and the support substrate;
- removing the support substrate;
- forming a cavity inside the semiconductor substrate, wherein the cavity overlaps the gap in the dummy pattern spaced apart from the cavity;
- and
- propagating cracks from the cavity to the gap in the dummy pattern thereby separating the first material layers and the second material layers into chip patterns.
Dependencies are inferred from the claim text.