Integrated circuit (IC) signatures with random number generator and one-time programmable device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShih-Lien Linus Lu, Kun-hsi Li, Shih-Liang Wang, Jonathan Tsung-Yung Chang, Yu-Der Chih, Cheng-En Lee
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Abstract
Systems and methods of generating a security key for an integrated circuit device include generating a plurality of key bits with a physically unclonable function (PUF) device. The PUF can include a random number generator that can create random bits. The random bits may be stored in a nonvolatile memory. The number of random bits stored in the nonvolatile memory allows for a plurality of challenge and response interactions to obtain a plurality of security keys from the PUF.
Claims20
A non-transitory computer-readable medium including contents that are configured to cause a computing system to generate a security key for an integrated circuit device, the method comprising:
- generating a plurality of key bits with a random number generator;
- storing the plurality of key bits in a nonvolatile memory that comprises a one-time programmable (OTP) device;
- generating the security key from the plurality of key bits stored in the nonvolatile memory;
- and
- locking the OTP device after storing the plurality of key bits, wherein a lock bit is set in the OTP device to indicate that the OTP device is locked, wherein, after the lock bit is set, the OTP device does not store additional bits.
A non-transitory computer-readable medium including contents that are configured to cause a computing system to carry out a method for generating a security key for an integrated circuit device, the method comprising:
- generating a plurality of key bits with a random number generator comprising a SRAM;
- storing the plurality of key bits in a nonvolatile memory comprising a one time programmable (OTP) device;
- and
- generating the security key from the plurality of key bits stored in the nonvolatile memory,
- wherein the SRAM stores fewer bits than the OTP device, and the SRAM is initialized two or more times to provide the plurality of key bits to the OTP device.
A one-time programmable (OTP) device in communication with a liner-feedback shift register (LFSR) and an input address scrambler, the OTP device configured to:
- store a set of scrambled key bits provided from the LFSR;
- associate the scrambled key bits with an address;
- receive a scrambled address from the input address scrambler;
- determine the address, associated with the scrambled key bits, which matches the scrambled address;
- read the scrambled key bits having the address that matches the scrambled address;
- and
- provide the scrambled key bits as the security key.
Dependencies are inferred from the claim text.