Nanostructure field-effect transistor device and method of forming

A method of forming a semiconductor device, the method comprising:

• forming a fin over a substrate, the fin comprising a layer stack and a semiconductor layer underlying the layer stack, the layer stack comprising alternating layers of a first semiconductor material and a second semiconductor material;
• forming a dummy gate structure over the fin;
• forming source/drain regions over the fin on opposing sides of the dummy gate structure;
• and
• replacing the dummy gate structure with a replacement gate structure, wherein replacing the dummy gate structure comprises:
• removing the dummy gate structure to expose the first semiconductor material and the second semiconductor material disposed under the dummy gate structure;
• removing the exposed first semiconductor material, wherein after removing the exposed first semiconductor material, the second semiconductor material remains to form channel regions of the semiconductor device;
• after removing the exposed first semiconductor material, reshaping middle portions of the channel regions while keeping end portions of the channel regions intact, wherein the end portions of the channel regions contact the source/drain regions, and the middle portions are between respective ones of the end portions, wherein removing the exposed first semiconductor material is performed using a first etchant selective to the first semiconductor material, wherein the first etchant is a first etching gas comprising F2 and HF, wherein reshaping the middle portions of the channel regions is performed using a second etchant selective to the second semiconductor material, wherein the second etchant is a second etching gas comprising a mixture of NF3 and NH3;
• forming a gate dielectric material around the channel regions;
• and
• forming a gate material around the gate dielectric material.

A method of forming a semiconductor device, the method comprising:

• forming a fin over a substrate, the fin comprising a semiconductor strip protruding above the substrate and a layer stack over the semiconductor strip, the layer stack comprising alternating layers of a first semiconductor material and a second semiconductor material;
• forming a dummy gate structure over the fin;
• forming source/drain regions over the fin on opposing sides of the dummy gate structure;
• forming an inter-layer dielectric (ILD) layer over the fin around the dummy gate structure;
• after forming the ILD layer, removing the dummy gate structure to expose the first semiconductor material and the second semiconductor material disposed under the dummy gate structure;
• removing the exposed first semiconductor material using a first etching process, wherein after the first etching process, the remaining second semiconductor material form channel regions of the semiconductor device;
• and
• after the first etching process, reshaping the channel regions using a second etching process different from the first etching process, wherein reshaping the channel regions comprises reducing thicknesses of middle portions of the channel regions and changing sidewall profiles of the middle portions of the channel regions, wherein a cross-section of the middle portion of each of the channel regions along a direction perpendicular to a longitudinal axis of the fin has a first shape before reshaping the channel regions, and has a second shape after reshaping the channel regions, wherein the first shape is a rectangular shape, and the second shape is a discorectangle shape, wherein the first etching process is performed using a first gas mixture comprising a first etching gas and a first carrier gas, wherein the first etching gas comprising F2 and HF, wherein the second etching process is performed using a second gas mixture comprising a second etching gas and a second carrier gas, wherein the second etching gas comprises F2 and NH3, wherein in the second gas mixture, a volume mixing ratio between F2 and NH3 is between about 1:4 and about 1:40, and a volume percentage of the second etching gas in the second gas mixture is between about 1:1 and about 1:10.