Semiconductor devices including channel regions having non-uniform Ge concentration
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsiao-Chun Chang, Guan-Jie Shen
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Abstract
In a method of manufacturing a semiconductor device including a Fin FET, a fin structure, which has an upper fin structure made of SiGe and a bottom fin structure made of a different material than the upper fin structure, is formed, a cover layer is formed over the fin structure, a thermal operation is performed on the fin structure covered by the cover layer, and a source/drain epitaxial layer is formed in a source/drain region of the upper fin structure. The thermal operation changes a germanium distribution in the upper fin structure.
Claims21
A semiconductor device, comprising:
- a fin structure having a channel region and a source/drain region;
- a gate structure including a gate dielectric layer over the channel region and a gate electrode over the gate dielectric layer;
- and
- a source/drain epitaxial layer formed in the source/drain region, wherein the channel region includes SiGe having a non-uniform Ge concentration that has a peak at a depth from a surface of the channel region and gradually and continuously decreases from the depth toward a center of the channel region, and wherein the Ge concentration at the surface of the channel region is in a range from 5 atomic % to 15 atomic %.
A semiconductor device, comprising:
- a fin structure having a channel region and a source/drain region;
- a gate structure including a gate dielectric layer over the channel region and a gate electrode over the gate dielectric layer;
- and
- a source/drain epitaxial layer formed in the source/drain region,
- wherein the channel region includes a SiGe layer having a non-uniform Ge concentration that has a peak at a depth from a surface of the channel region and gradually and continuously decreases from the depth toward a center of the channel region and a cap semiconductor layer over the SiGe layer, and wherein the Ge concentration at the surface of the channel region is in a range from 5 atomic % to 15 atomic %.
A semiconductor device, comprising:
- a fin structure having a fin bottom structure and an upper fin portion including a channel region and a source/drain region;
- an isolation insulating layer from which the channel region protrudes;
- a gate structure including a gate dielectric layer over the channel region and a gate electrode over the gate dielectric layer;
- and
- a source/drain epitaxial layer formed in the source/drain region,
- wherein the channel region includes a SiGe layer having a non-uniform Ge concentration that has a peak at a depth from a surface of the channel region and gradually and continuously decreases from the depth toward a center of the channel region, and wherein the Ge concentration at the surface of the channel region is in a range from 5 atomic % to 15 atomic %.
Dependencies are inferred from the claim text.