Integrated circuit with a fin and gate structure and method making the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuo-Cheng Chiang, Teng-Chun Tsai, Kuan-Lun Cheng, Chih-Hao Wang
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Abstract
The present disclosure provides a semiconductor structure. The semiconductor structure includes device fins formed on a substrate; fill fins formed on the substrate and disposed among the device fins; and gate stacks formed on the device fins and the fill fins. The fill fins include a first dielectric material layer and a second dielectric material layer deposited on the first dielectric material layer. The first and second dielectric material layers are different from each other in composition.
Claims20
A semiconductor structure comprising:
- a first device fin and a second device fin formed on a substrate;
- dielectric fins formed on the substrate, wherein the dielectric fins include a first dielectric fin with a first width and a second dielectric fin with a second width being greater than the first width;
- and
- a gate stack formed on the first and second device fins and the first and second dielectric fins.
A method for fabricating an integrated circuit, comprising:
- forming device fins on a substrate with trenches defined among the device fins;
- filling the trenches with a first, a second, and a third dielectric material layers sequentially;
- and
- selectively removing upper portions of the first dielectric material layer, resulting in a first dielectric fin and a second dielectric fin being spaced away from the device fins with gaps defined therein, wherein the first dielectric fin includes a first width and the second dielectric fin includes a second width being greater than the first width.
A semiconductor structure, comprising:
- a first device fin and a second device fin formed on a substrate;
- a first dielectric fin formed on the substrate and disposed between the first and second device fins;
- a second dielectric fin formed on the substrate and disposed on a side of the second device fin opposite to the first device fin, wherein the first dielectric fin includes a first width and the second dielectric fin includes a second width greater than the first width;
- and
- a gate stack disposed on the first and second device fins and the first and second dielectric fins.
The semiconductor structure of 18, wherein a first portion of the gate stack is inserted in a first gap between the first device fin and the first dielectric fin, and a second portion of the gate stack is inserted in a second gap between the second device fin and the first dielectric fin.
Dependencies are inferred from the claim text.