Negative capacitance transistor with external ferroelectric structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChi-Hsing Hsu, Sai-Hooi Yeong, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang, Min Cao
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Abstract
A first fin structure is disposed over a substrate. The first fin structure contains a semiconductor material. A gate dielectric layer is disposed over upper and side surfaces of the first fin structure. A gate electrode layer is formed over the gate dielectric layer. A second fin structure is disposed over the substrate. The second fin structure is physically separated from the first fin structure and contains a ferroelectric material. The second fin structure is electrically coupled to the gate electrode layer.
Claims20
A method of fabricating a semiconductor device, comprising:
- forming a dielectric layer over a semiconductor fin structure, wherein the semiconductor fin structure protrudes upward out of a substrate;
- etching the dielectric layer to form a trench;
- forming a hybrid fin structure in the trench by depositing a ferroelectric material in the trench;
- forming a gate dielectric layer over at least the semiconductor fin structure;
- and
- forming a gate electrode layer over the semiconductor fin structure and the hybrid fin structure.
A method of fabricating a semiconductor device, comprising:
- forming a first fin structure that protrudes vertically upward from a substrate;
- after the first fin structure is formed, forming a second fin structure that protrudes vertically upward from the substrate, wherein the second fin structure is spaced apart from the first fin structure, wherein the first fin structure and the second fin structure have different material compositions, and wherein one of the first fin structure and the second fin structure has a non-semiconductor material composition;
- performing one or more etching processes, wherein upper corners of the first fin structure and the second fin structure are rounded by the one or more etching processes;
- forming, after the performing of the one or more etching processes, a dummy gate structure over the first fin structure and the second fin structure;
- and
- replacing the dummy gate structure with a metal-containing gate structure.
A method of fabricating a semiconductor device, comprising:
- forming a mask layer over a semiconductor fin structure that protrudes vertically from a substrate;
- etching a recess into the mask layer;
- depositing a ferroelectric material in the recess;
- forming a trench that vertically extends through the ferroelectric material;
- filling the trench with an electrically isolating material;
- and
- forming a metal-containing gate structure over the semiconductor fin structure and over the ferroelectric material, wherein the forming the metal-containing gate structure comprises forming an interfacial layer over the semiconductor fin structure but not over the ferroelectric material.
Dependencies are inferred from the claim text.