Image sensor intended to be illuminated via a back side, and corresponding method for acquiring a light flux
AssigneeSTMicroelectronics (Crolles 2) SAS
InventorFrancois Roy
Life of this patent
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Abstract
A back side illuminated image sensor includes a pixel formed by three doped photosensitive regions that are superposed vertically in a semiconductor substrate. Each photosensitive region is laterally framed by a respective vertical annular gate. The vertical annular gates are biased by a control circuit during an integration phase so as to generate an electrostatic potential comprising potential wells in the central portion of the volume of each doped photosensitive region and a potential barrier at each interface between two neighboring doped photosensitive regions.
Claims9
A method for acquiring a light flux using a pixel of an image sensor illuminated via a back side of a semiconductor substrate incorporating said pixel, the back side being opposite a front side of the semiconductor substrate, wherein said pixel comprises a first and second doped photosensitive regions that are superposed vertically in the semiconductor substrate between the back side and the front side, an upper portion of the first doped photosensitive region being laterally framed by a vertical annular transfer gate, said first doped photosensitive region being laterally framed by a first vertical annular gate that annularly surrounds the vertical annular transfer gate, said second doped photosensitive region being laterally framed by a second vertical annular gate that annularly surrounds the first vertical annular gate, the method comprising:
- performing an integration phase during which said back side is illuminated with said light flux;
- and
- biasing the vertical annular transfer gate and the first and second vertical annular gates during the integration phase so as to generate an electrostatic potential providing potential wells in a central portion of a volume of each doped photosensitive region and a potential barrier at each interface between two neighboring doped photosensitive regions.
A method, comprising:
- in an integration mode:
- biasing a vertical annular transfer gate laterally framing a read node and an upper portion of a first doped photosensitive region to block charge transfer from the first doped photosensitive region to the read node;
- biasing a first vertical annular gate laterally framing the first doped photosensitive region and surrounding the vertical annular transfer gate to form a first potential well in a remainder of the first doped photosensitive region which collects first integrated photogenerated charge;
- biasing a second vertical annular gate laterally framing the second doped photosensitive region and surrounding the first vertical annular gate to form a second potential well in the second doped photosensitive region which collects second integrated photogenerated charge;
- and
- in a color read-out transfer mode:
- a) biasing said vertical annular transfer gate to permit charge transfer from the first doped photosensitive region to the read node and empty said first integrated photogenerated charge from the first potential well to the read node;
- b) biasing said vertical annular transfer gate to block charge transfer from the first doped photosensitive region to the read node;
- c) biasing said first vertical annular gate to empty second integrated photogenerated charge from the second potential well to the first potential well;
- d) biasing said vertical annular transfer gate to permit charge transfer from the first doped photosensitive region to the read node and empty said second integrated photogenerated charge from the first potential well to the read node;
- and
- e) biasing said vertical annular transfer gate to block charge transfer from the first doped photosensitive region to the read node.
A method, comprising:
- in an integration mode:
- biasing a vertical annular transfer gate laterally framing a read node and an upper portion of a first doped photosensitive region to block charge transfer from the first doped photosensitive region to the read node;
- biasing a first vertical annular gate laterally framing the first doped photosensitive region and surrounding the vertical annular transfer gate to form a first potential well in a remainder of the first doped photosensitive region which collects first integrated photogenerated charge;
- biasing a second vertical annular gate laterally framing the second doped photosensitive region and surrounding the first vertical annular gate to form a second potential well in the second doped photosensitive region which collects second integrated photogenerated charge;
- and
- in an intensity read-out transfer mode:
- a) biasing said first vertical annular gate to empty second integrated photogenerated charge from the second potential well to be added to the first integrated photogenerated charge at said first potential well;
- and
- b) biasing said vertical annular transfer gate to permit charge transfer from the first doped photosensitive region to the read node and empty said added first and second integrated photogenerated charge from the first potential well to the read node.
Dependencies are inferred from the claim text.