Edge seals for semiconductor packages

A semiconductor package comprising:

• a digital signal processor, comprising a first side and a second side;
• an image sensor array comprising a first side and a second side;
• a first plurality of hybrid bond interconnect (HBI) bond pads comprised in the digital signal processor;
• a second plurality of HBI bond pads comprised in the image sensor array;
• an edge seal comprised in the image sensor array and the digital signal processor;
• a first metal stack comprised within the digital signal processor;
• a second metal stack comprised within the image sensor array;
• and
• a via bar having a width that is smaller than a width of each HBI bond pad of the first plurality of HBI bond pads and the second plurality of HBI bond pads;
• wherein the digital image signal processor is coupled to the image sensor array through the first plurality of HBI bond pads and the second plurality of HBI bond pads;
• wherein the via bar electrically couples the first metal stack and the second metal stack;
• wherein the via bar forms an additional seal inside the edge seal;
• and
• wherein the width of the via bar is less than a widest width of the first metal stack and is less than a widest width of the second metal stack.

A semiconductor package comprising:

• a digital signal processor, comprising a first side and a second side;
• an image sensor array comprising a first side and a second side, the first side of the image sensor array mechanically and electrically coupled to the second side of the digital signal processor through a plurality of hybrid bond interconnect (HBI) bond pads and an edge seal;
• a first metal stack comprised within the digital signal processor;
• a second metal stack comprised within the image sensor array;
• and
• a via bar electrically coupling the first metal stack and the second metal stack;
• wherein the via bar forms an additional seal inside the edge seal;
• and
• wherein a width of the via bar is less than a widest width of the first metal stack and is less than a widest width of the second metal stack.