High voltage device and manufacturing method thereof

A manufacturing method of a high voltage device, wherein the high voltage device is for use as a low-side switch in a power stage of a switching regulator, the manufacturing method comprising:

• forming at least one lateral diffused metal oxide semiconductor (LDMOS) device, by manufacturing steps including:
• forming a well in a semiconductor layer, wherein the well has a first conductivity type;
• forming a body region in the well, wherein the body region has a second conductivity type;
• forming a gate on the body region and in contact with the body region;
• and
• forming a source and a drain having the first conductivity, wherein the source and the drain are located at different sides out of the gate respectively, wherein the source is located in the body region, and the drain is located in the well;
• forming a first isolation region having the second conductivity type in the semiconductor layer, wherein the first isolation region encloses the LDMOS device;
• forming a second isolation region having the first conductivity type in the semiconductor layer, wherein the second isolation region encloses the first isolation region;
• forming a third isolation region having the second conductivity type in the semiconductor layer, wherein the third isolation region encloses the second isolation region;
• and
• forming a current limiting device, wherein the current limiting device is electrically connected to the second isolation region and is configured to operably suppress a parasitic silicon controlled rectifier (SCR) from being turned on;
• wherein part of the body region, which is between the source and a boundary of the body region, and is right below the gate, forms an inversion region which serves as an inversion current channel in an ON operation of the LDMOS device;
• wherein part of the well between the body region and the drain is a drift region, which serves as a drift current channel in the ON operation of the LDMOS device.