Power-tap pass-through to connect a buried power rail to front-side power distribution network

A semiconductor device, comprising:

• a first device plane including an array of cells each including a transistor device, the first device plane formed on a working surface of a substrate, the first device plane having a front side and a backside opposite the front side;
• a signal wiring structure formed on the front side of the first device plane;
• a front-side power distribution network (FSPDN) positioned on the front side of the first device plane;
• a first buried power rail (BPR) disposed below the first device plane on the backside of the first device plane;
• and
• a power tap structure in the first device plane, the power tap structure electrically connecting the first BPR to the FSPDN and electrically connecting the first BPR to at least one of the transistor devices to provide power to the at least one of the transistor devices.