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US 11,961,797 B2Granted
Semiconductor package and fabricating method thereof
AssigneeAmkor Technology Singapore Holding Pte. Ltd.
InventorsKeun Soo Kim, Jae Yun Kim, Byoung Jun Ahn, Dong Soo Ryu, Dae Byoung Kang, Chel Woo Park
Life of this patent
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Abstract
A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.
Claims19
A semiconductor package comprising:
- a substrate comprising a top substrate side, a bottom substrate side, a plurality of lateral substrate sides between the top and bottom substrate sides, and a top substrate circuit pattern on the top substrate side;
- a semiconductor die mounted on the top substrate side, the semiconductor die comprising a top die side, a bottom die side facing the top substrate side, and a plurality of lateral die sides;
- an interposer comprising:
- a top interposer side;
- a bottom interposer side;
- a plurality of lateral interposer sides;
- and
- a bottom interposer circuit pattern on the bottom interposer side;
- a top adhesive that covers the top die side and bonds the top die side to the bottom interposer side;
- a vertical interconnect structure comprising:
- a top vertical interconnect end that is bonded to the bottom interposer circuit pattern;
- and
- a bottom vertical interconnect end that is bonded to the top substrate circuit pattern;
- and
- an encapsulating material, of a different material from the top adhesive, comprising a top encapsulant side facing the bottom interposer side, a bottom encapsulant side facing the top substrate side, and a plurality of lateral encapsulant sides, where:
- the encapsulating material directly contacts the lateral die sides and a lateral side of the top adhesive, and laterally surrounds the vertical interconnect structure;
- and
- the lateral interposer sides and the lateral substrate sides are free of the encapsulating material.
15 more elements
A semiconductor package comprising:
- a substrate comprising a top substrate side, a bottom substrate side, a plurality of lateral substrate sides between the top and bottom substrate sides, and a top substrate circuit pattern on the top substrate side;
- a semiconductor die mounted on the top substrate side, the semiconductor die comprising a top die side, a bottom die side facing the top substrate side, and a plurality of lateral die sides;
- an interposer comprising:
- a top interposer side;
- a bottom interposer side;
- a plurality of lateral interposer sides;
- and
- a bottom interposer circuit pattern on the bottom interposer side;
- a vertical interconnect structure comprising:
- a first material comprising a conductive metal;
- and
- a second material, different from the first material, that contacts and laterally surrounds the conductive metal of the first material;
- a top vertical interconnect end that is bonded to the bottom interposer circuit pattern;
- and
- a bottom vertical interconnect end that is bonded to the top substrate circuit pattern;
- and
- an encapsulating material, different from the second material, comprising a top encapsulant side facing the bottom interposer side, a bottom encapsulant side facing the top substrate side, and a plurality of lateral encapsulant sides, where:
- the encapsulating material laterally surrounds the semiconductor die, and the vertical interconnect structure;
- the lateral interposer sides and the lateral substrate sides are free of the encapsulating material;
- and
- the top encapsulant side directly contacts the bottom interposer side.
18 more elements
A method of manufacturing a semiconductor package, the method comprising:
- providing a substrate comprising a top substrate side, a bottom substrate side, a plurality of lateral substrate sides between the top and bottom substrate sides, and a top substrate circuit pattern on the top substrate side;
- providing a semiconductor die mounted on the top substrate side, the semiconductor die comprising a top die side, a bottom die side facing the top substrate side, and a plurality of lateral die sides;
- providing an interposer comprising:
- a top interposer side;
- a bottom interposer side;
- a plurality of lateral interposer sides;
- and
- a bottom interposer circuit pattern on the bottom interposer side;
- providing a top adhesive that covers the top die side and bonds the top die side to the bottom interposer side;
- providing a vertical interconnect structure comprising:
- a top vertical interconnect end that is bonded to the bottom interposer circuit pattern;
- and
- a bottom vertical interconnect end that is bonded to the top substrate circuit pattern;
- and
- providing an encapsulating material, of a different material from the top adhesive, comprising a top encapsulant side facing the bottom interposer side, a bottom encapsulant side facing the top substrate side, and a plurality of lateral encapsulant sides, where:
- the encapsulating material directly contacts the lateral die sides and a lateral side of the top adhesive, and laterally surrounds the vertical interconnect structure;
- and
- the lateral interposer sides and the lateral substrate sides are free of the encapsulating material.
15 more elements
Dependencies are inferred from the claim text.