Method of forming a molded substrate electronic package and structure

A method for forming an electronic component, comprising:

• providing lands that are laterally separated by spaces, the lands having land top surfaces, opposing land bottom surfaces, and comprising a conductor;
• forming an insulator within the spaces, the insulator having an insulator top surface and an insulator bottom surface, the insulator top surface covering the land top surfaces, wherein:
• the land bottom surfaces are exposed through the insulator bottom surface;
• reducing thickness of the insulator from the insulator top surface inward to provide a reduced thickness insulator top surface, wherein:
• the land top surfaces are exposed in the reduced thickness insulator top surface;
• forming conductive patterns over the reduced thickness insulator top surface and coupled to the land top surfaces;
• coupling an electronic device to the conductive patterns;
• and
• forming a package body encapsulating at least portions of the electronic device;
• wherein:
• coupling the electronic device comprises coupling a semiconductor component to the conductive patterns in a flip-chip configuration;
• the semiconductor component comprises a first major surface, a second major surface opposite to the first major surface, and a side surface connecting the first major surface to the second major surface;
• the side surface of the semiconductor component define a perimeter;
• and
• all the lands of the electronic component are inside the perimeter and external interconnects for the electronic component.

A method for forming an electronic component, comprising:

• providing a carrier substrate comprising a first surface, an opposing second surface, and a conductive film over the opposing second surface;
• providing lands adjacent to the conductive film, the lands laterally separated by spaces, the lands having land top surfaces adjacent to the conductive film and opposing land bottom surfaces;
• providing an insulator within the spaces and having an insulator top surface and an insulator bottom surface, wherein the land bottom surfaces are exposed through the insulator bottom surface;
• removing the carrier substrate while leaving the conductive film in place adjacent to the land top surfaces;
• patterning the conductive film to provide conductive patterns coupled to the land top surfaces;
• coupling an electronic device to the conductive patterns;
• and
• forming a package body encapsulating at least portions of the electronic device.