CMOS FinFET structures including work-function materials having different proportions of crystalline orientations and methods of forming the same

A method of forming semiconductor device, the method comprising:

• forming a first fin extending from a first region of a semiconductor substrate and a second fin extending from a second region of the semiconductor substrate;
• forming a first dummy gate structure over the first fin and a second dummy gate structure over the second fin;
• forming a dielectric layer over the first fin and the second fin, the dielectric layer being adjacent the first dummy gate structure and the second dummy gate structure;
• removing the first dummy gate structure to form a first trench;
• removing the second dummy gate structure to form a second trench;
• forming a first gate dielectric layer over the first fin in the first trench and a second gate dielectric layer over the second fin in the second trench;
• forming a first capping layer over the first gate dielectric layer in the first trench and a second capping layer over the second gate dielectric layer in the second trench;
• forming a first work-function layer over the first capping layer using a first set of process parameters, wherein the first work-function layer has a first work-function;
• forming a second work-function layer over the second capping layer using a second set of process parameters, wherein the second work-function layer has a second work-function, wherein the first work-function layer and the second work-function layer comprise a same material, wherein the first work-function is different than the second work-function;
• wherein the first work-function layer has a first proportion of a first crystalline orientation, wherein the second work-function layer has a second proportion of the first crystalline orientation, wherein the first proportion being different than the second proportion;
• and
• forming a bulk metal on the first work-function layer and on the second work-function layer;
• wherein forming the first capping layer and the second capping layer further comprises:
• forming a capping material layer in a trench;
• and
• recessing the capping material layer to below an upper surface of the first gate dielectric layer, or below an upper surface of the second gate dielectric layer.

A method of forming semiconductor device, the method comprising:

• forming a first fin extending from a first region of a semiconductor substrate and a second fin extending from a second region of the semiconductor substrate;
• forming a first dummy gate structure over the first fin and a second dummy gate structure over the second fin;
• forming a dielectric layer over the first fin and the second fin, the dielectric layer being adjacent the first dummy gate structure and the second dummy gate structure;
• removing the first dummy gate structure to form a first trench;
• removing the second dummy gate structure to form a second trench;
• forming a first gate dielectric layer over the first fin in the first trench and a second gate dielectric layer over the second fin in the second trench, the first gate dielectric layer and the second gate dielectric layer extending over an upper surface of the dielectric layer;
• forming a first capping layer over the first gate dielectric layer in the first trench and a second capping layer over the second gate dielectric layer in the second trench, the first capping layer and the second capping layer extending over the upper surface of the dielectric layer;
• recessing the first capping layer and the second capping layer below the upper surface of the dielectric layer, and below an upper surface of the first gate dielectric layer or below an upper surface of the second gate dielectric layer;
• forming a first work-function layer over the first capping layer using a first set of process parameters, wherein the first work-function layer has a first work-function and a first proportion of a first crystalline orientation;
• and
• forming a second work-function layer over the second capping layer using a second set of process parameters, wherein the second work-function layer has a second work-function and a second proportion of the first crystalline orientation, wherein the first proportion being different than the second proportion, wherein the first work-function layer and the second work-function layer comprise a same material, wherein the first work-function is different than the second work-function;
• and
• forming a bulk metal on the first work-function layer and on the second work-function layer.