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US 11,961,742 B2Granted
Semiconductor device and manufacturing method thereof
AssigneeAmkor Technology Singapore Holding Pte. Ltd.
InventorsJong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Abstract
A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.
Claims18
An electronic device comprising:
- an under layer (UL) comprising a top UL side, a bottom UL side, and a UL aperture that extends between the top UL side and the bottom UL side;
- an interposer comprising:
- a bottom interposer side coupled to the top UL side, a top interposer side, and a lateral interposer side;
- an interposer dielectric layer at the bottom interposer side;
- and
- an interposer conductive layer at the bottom interposer side, wherein at least a portion of the interposer conductive layer is exposed through the under layer (UL) by the UL aperture;
- an upper dielectric layer on the top interposer side;
- an upper conductive layer on the top interposer side;
- a lower signal distribution structure on the bottom UL side and configured to electrically couple an interconnection structure to a bottom side of the interposer conductive layer through the UL aperture;
- a first semiconductor die electrically coupled to the interposer through the upper conductive layer, wherein the first semiconductor die vertically covers only a first portion of the interposer;
- and
- a second semiconductor die electrically coupled to the interposer through the upper conductive layer, wherein the second semiconductor die vertically covers only a second portion of the interposer.
9 more elements
An electronic device, comprising:
- an under layer (UL) of a mold material and comprising a top UL side, a bottom UL side, and a UL aperture that extends between the top UL side and the bottom UL side;
- an interposer dielectric layer comprising a top side and a bottom side, wherein the bottom side of the interposer dielectric layer outwardly faces the top UL side and is coupled to the under layer (UL) via the top UL side;
- an interposer conductive layer comprising a top side and a bottom side, wherein the bottom side of the interposer conductive layer is coplanar with the bottom side of the interposer dielectric layer, and wherein at least a portion of the bottom side of the interposer conductive layer is exposed through the under layer (UL) by the UL aperture;
- an upper dielectric layer on the top side of the interposer dielectric layer;
- an upper conductive layer on the top side of the interposer conductive layer;
- and
- a lower signal distribution structure comprising a lower signal distribution structure top side, wherein the lower signal distribution structure top side outwardly faces the bottom UL side and is electrically coupled to the interposer conductive layer via the UL aperture and the bottom side of the interposer conductive layer;
- and
- wherein the mold material of the under layer (UL) is a remnant of a thinned layer.
6 more elements
A method of manufacturing an electronic device, the method comprising:
- providing an under layer (UL) comprising a top UL side, a bottom UL side, and a UL aperture that extends between the top UL side and the bottom UL side;
- providing an interposer comprising:
- a bottom interposer side coupled to the top UL side, a top interposer side, and a lateral interposer side;
- an interposer dielectric layer at the bottom interposer side;
- and
- an interposer conductive layer at the bottom interposer side, wherein at least a portion of the interposer conductive layer is exposed through the under layer (UL) by the UL aperture;
- providing an upper dielectric layer on the top interposer side;
- providing an upper conductive layer on the top interposer side;
- providing a lower signal distribution structure on the bottom UL side that electrically couples an interconnection structure to a bottom side of the interposer conductive layer through the UL aperture;
- providing a first semiconductor die electrically coupled to the interposer through the upper conductive layer, wherein the first semiconductor die vertically covers only a first portion of the interposer;
- and
- providing a second semiconductor die electrically coupled to the interposer through the upper conductive layer, wherein the second semiconductor die vertically covers only a second portion of the interposer.
9 more elements
Dependencies are inferred from the claim text.