Manufacturing method for integrating gate dielectric layers of different thicknesses

A method for manufacturing semiconductor devices, wherein the semiconductor devices comprise gate dielectric layers at different thicknesses, the method comprising:

• providing a semiconductor substrate for the semiconductor devices, wherein the semiconductor devices operate at different voltages associated with the gate dielectric layers at different thicknesses, wherein a thinner gate dielectric layer results in a lower operating voltage, wherein a gate dielectric layer at a thickness other than a minimum thickness is fabricated by following steps:
• step 1:
• forming a first mask layer on a top surface of the semiconductor substrate;
• step 2:
• patterning a region for one of the semiconductor devices and removing the first mask layer in the region to form a first opening, wherein said one of the semiconductor devices is configured to have a gate dielectric layer at a desired thickness;
• step 3:
• forming a second groove at a bottom of the first opening by etching, wherein a depth of the second groove is configured to be the desired thickness of the gate dielectric layer of said semiconductor device;
• step 4:
• filling the second groove and the first opening with a second material layer which relates to said gate dielectric layer;
• step 5:
• forming said gate dielectric layer by etching back the second material layer, wherein a top surface of the second material layer is flush with a top surface of the semiconductor substrate;
• step 6:
• removing a remaining portion of the first mask layer;
• and
• repeating the steps 1 to 6 to form the gate dielectric layers of different thicknesses, wherein top surfaces of the gate dielectric layers of different thicknesses are configured to be at a same level.