Memory device and method of operating the same
AssigneeSK hynix Inc.
InventorsJune Young Choi, Un Sang Lee
Life of this patent
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Abstract
A memory device includes a memory block including memory cells to which a program voltage is applied through a word line. The memory device also includes a peripheral circuit configured to perform a verify operation of comparing threshold voltages of the memory cells with a verify voltage on each of a plurality of program levels. The memory device further includes a control logic circuit configured to control the peripheral circuit to apply a plurality of blind voltages related to a target level among the plurality of program levels to the word line, and determine a start time point of a verify operation corresponding to a next program level of the target level using the number of fail bits for each of the plurality of blind voltages.
Claims20
A memory device comprising:
- a memory block including memory cells to which a program voltage is applied through a word line;
- a peripheral circuit configured to perform a verify operation of comparing threshold voltages of the memory cells with a verify voltage on each of a plurality of program levels;
- and
- a control logic circuit configured to control the peripheral circuit to apply a plurality of blind voltages related to a target level among the plurality of program levels to the word line, and determine a start time point of a verify operation corresponding to a next program level of the target level using a number of fail bits for each of the plurality of blind voltages.
A memory device comprising:
- a memory block including memory cells to which a program voltage is applied through a word line;
- a peripheral circuit configured to perform a verify operation of comparing threshold voltages of the memory cells with a verify voltage on each of a plurality of program levels;
- and
- a control logic circuit configured to control the peripheral circuit to apply a plurality of blind voltages related to a first level among the plurality of program levels to the word line in a voltage magnitude order, and determine a start time point of a verify operation corresponding to a second level that is a next program level of the first level using a number of fail bits for each of the plurality of blind voltages.
A method of operating a memory device, the method comprising:
- applying a program voltage to memory cells through a word line;
- and
- performing a verify operation of comparing threshold voltages of the memory cells with a verify voltage on each of a plurality of program levels, wherein performing the verify operation comprises:
- applying a plurality of blind voltages related to a target level among the plurality of program levels to the word line;
- and
- determining a start time point of a verify operation corresponding to a next program level of the target level using a number of fail bits for each of the plurality of blind voltages.
A method of operating a memory device, the method comprising:
- applying a program voltage to memory cells through a word line;
- and
- performing a verify operation of comparing threshold voltages of the memory cells with a verify voltage on each of a plurality of program levels, wherein performing the verify operation comprises:
- applying a plurality of blind voltages related to a first level among the plurality of program levels to the word line in a voltage magnitude order;
- and
- determining a start time point of a verify operation corresponding to a second level that is a next program level of the first level using a number of fail bits for each of the plurality of blind voltages.
Dependencies are inferred from the claim text.