Semiconductor memory device detecting program failure, and method of operating the same

A method of operating a semiconductor memory device including a plurality of memory cells, the method comprising performing a program operation of programming memory cells coupled to a selected word line among the plurality of memory cells,

• wherein the program operation includes a plurality of program loops and each of the plurality of program loops comprises:
• applying a program voltage to the selected word line;
• performing one or more verify operations respectively corresponding to one or more program states on memory cells coupled to the selected word line;
• and
• counting a multiple number of the verify operations at increasing verify voltages that are performed in a current program loop.

A semiconductor memory device, comprising:

• a memory cell array including a plurality of memory cells;
• a peripheral circuit configured to perform a program operation on selected memory cells coupled to a selected word line among the plurality of memory cells, the program operation comprising a plurality of program loops, each of the plurality of program loops comprising a program phase and a verify phase, the verify phase including one or more verify operations;
• and
• a control logic configured to control the program operation of the peripheral circuit, the control logic comprising:
• a verify operation counter configured to count a multiple number of the verify operations whose verify voltages are different from each other, performed by the peripheral circuit in one of the plurality of program loops during the program operation;
• a maximum-number-of-verify-operations storage configured to store a maximum number of verify operations;
• and
• an excessive verify operation detector configured to compare the number of the verify operations performed in the program loop with the maximum number of verify operations, and determine whether the program operation has succeeded based on a result of the comparison.